模块代码
module mux2_1(
//定义输入输出
//两路输入信号
input wire in_1,
input wire in_2,
//一路选择信号
input wire sel,
//一路输出信号
output reg out
);
//sel信号为“1”则选择第一路输入信号,否则选第二路
always@(*)
if(sel==1'b1)
out=in_1;
else
out=in_2;
endmodule
testbench
`timescale 1ns / 1ns
module tb_mux2_1();
reg in_1;
reg in_2;
reg sel;
wire out;
initial
begin
in_1<=1'b0;
in_2<=1'b0;
sel<=1'b0;
end
always #10 in_1<={$random}%2;
always #10 in_2<={$random}%2;
always #10 sel<={$random}%2;
initial
begin
$timeformat(-9,0,"ns",6);
$monitor("@time %t:in_1=%b in_2=%b sel=%b out=%b",$time,in_1,in_2,sel,out);
end
mux2_1 mux2_1_in
(
.in_1(in_1),
.in_2(in_2),
.sel(sel),
.out(out)
);
endmodule