dsPIC33F之Cycle-by-Cycle fault operation Comparator with PWM

// ****************************************************************************
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// ****************************************************************************
//
//	File: MainCode.c
//
//	Dependencies:    Header (.inc) files if applicable, see below
//	Processor:       dsPIC33FJ64GS610
//	Compiler:        MPLAB. C30 v3.01 or higher
//	IDE:             MPLAB. IDE v8.36.02 or later
//
// ****************************************************************************
//	REVISION HISTORY:                                                         
// ============================================================================
//	Author            Date      Comments on this revision
// ----------------------------------------------------------------------------
//	Antonio Bersani		07.30.08	First Release
//  Anusheel Nahar               09.17.09         
//
// ****************************************************************************
//
//	Notes:
//		This code example shows how to program the cycle-by-cycle fault operation.
//		Comparator 1 (CMP1A, pin 25) is used as the comparator input.
//		A Low value on this pin will trigger the fault operation, and the PWM
//		output is reset. As soon as the fault signal is removed, the PWM output
//		will be immediately active.
//
// ****************************************************************************


// ****************************************************************************
//
//	Include files
//
// ============================================================================	
// Processor dependent
#include			"p33fj64gs610.h"
#include			"ConfigBits.h"
#include			"MainCode.h"

// ****************************************************************************
//
// 	Variables Definition
//
// ============================================================================

// ****************************************************************************
//
//	Function: void main(void)
//
// ============================================================================
//	Main Code
// ----------------------------------------------------------------------------
int main(void) {
	// **************************************************************************
	//
	//	Init CPU registers and peripherals
	//
	// **************************************************************************
	SystemClocks();		// init clock
	PortsInit();																// init I/O ports
	PWMInit();																// init PWM1
	Fault1Init();																// Init Fault in cycle by cycle mode

	PTCONbits.PTEN = TRUE;	// start the PWM operation
	
	while ( 1 ) {																// endless loop
	};	
}


// ****************************************************************************
//
//	Function: void SystemClocks(void)
//
// ============================================================================
//	
//	FRC oscillator used: Fin = 7.37 MHz
//	Fosc = Fin * M /( N1 * N2)
//		M	= PLLFDBbits.PLLDIV + 2		[constant name: PLL_FDBK]
//		N1	= CLKDIVbits.PLLPRE		[constant name: PLL_PRE]
//		N2	= CLKDIVbits.PLLPOST		[constant name: PLL_POST]
//	Fosc = Fin * PLLFDBbits.PLLDIV / ( CLKDIVbits.PLLPRE * CLKDIVbits.PLLPOST)
//	Fosc = 7.37 MHz * 43 /(2 * 2) = 79.2275 MHz
//
//	Check of frequency ranges:
//	output from PLLPRE: F = 3.685 MHz			OK
//	output from VCO		: F = 158.455 MHz		OK
//	output from PLL		: F = 79.2275 MHz		OK
//	
//	Fcy = Fosc / 2
//	Fcy = 79.2275 / 2 = 39.61375 MHz
//
// ----------------------------------------------------------------------------
void SystemClocks(void) {
	// ==========================================================================
	//
	// Primary clock sysytem
	//
	// --------------------------------------------------------------------------
	PLLFBD = PLL_FDBK;
	CLKDIV = 0;
	CLKDIVbits.PLLPOST = PLL_POST;
	CLKDIVbits.PLLPRE = PLL_PRE;

	// switch to FRC + PLL
	__builtin_write_OSCCONH(0x01);				// New oscillator: FRC w/ PLL
	__builtin_write_OSCCONL(0x01);				// Oscillator switch enable

	// loop waiting for oscillator switch operation completed
	while( !OSCCONbits.COSC ) {
	};
	// loop waiting for PLL lock
	while( !OSCCONbits.LOCK ) {
	}	;

	// ==========================================================================
	//
	// Auxiliary clock sysytem
	//
	//	Input clock: FRCCLK
	// 		Multiply by 16, Fpwm/adc = 7.37 MHz * 16 = 117.92 MHz
	//
	//	ACLKCON: auxiliary clock divisor control register
	//		
	// --------------------------------------------------------------------------
	ACLKCON = 0;
	ACLKCONbits.FRCSEL = 1;			// source clock is FRC
	ACLKCONbits.SELACLK = 1;			// Primary Aux Oscillator
	ACLKCONbits.APSTSCLR = AUX_OSC_DIVIDE;	// Divide factor
	ACLKCONbits.ENAPLL = TRUE;			// enable aux clock generation
	
	// loop waiting for aux PLL lock
	while( !ACLKCONbits.APLLCK ) {
	};
}

// ****************************************************************************
//
//	Function: void PortsInit(void)
//
// ============================================================================
//	Selection of analog @ digital pins is done in ADC init function
// ----------------------------------------------------------------------------
void PortsInit(void) {
	// ==========================================================================
	// PWM1L, PWM1H
	// --------------------------------------------------------------------------
	// PWM1L, PWM1H: init individual pin value
	LATAbits.LATA3 = 0;												// PWM1L = 1 [to keep Vout = 0]
	LATAbits.LATA4 = 0;												// PWM1H = 0
	
	// PWM1L, PWM1H: init PWM output pins as output
	TRISAbits.TRISA3 = 0;
	TRISAbits.TRISA4 = 0;
}


// ============================================================================
//
//	PWM: General pwm init function
//				
// ----------------------------------------------------------------------------
void PWMInit(void) {
	
	// PTCON: PWM Time Base Control Register
	PTCON = 0;
	
	// PTCON2: PWM Clock Divider Select Register
	PTCON2 = 0;
	
	// PTPER: PWM Master Time Base Register
	PTPER = PWM_PERIOD;
	
	// SEVTCMP: PWM Special Event Compare Register
	SEVTCMP = 0;
	
	// MDC: PWM Master Duty Cycle Register
	MDC = 0;
	PWMCON1bits.ITB = 0;		// PTPER based operation
	PWMCON1bits.MDCS = 0;
	PWMCON1bits.IUE = 0;
	PWMCON1bits.DTC = 0; 

	// (S)PDCx: PWM Generator Duty Cycle Register
	PDC1 = ( PWM_PERIOD / 2);
	SDC1 = 0;
	PHASE1 = 0;
	SPHASE1 = 0;
	
	// DTRx: PWM Dead Time Register
	DTR1 = B1_RE_DEADTIME;
	
	// ALTDTRx: PWM Alternate Dead Time Register
	ALTDTR1 = B1_FE_DEADTIME;

	IOCON1 = 0;
	IOCON1bits.PENH = 1;
	IOCON1bits.PENL = 1;
	IOCON1bits.POLH = 0;		// PWM H output active high
	IOCON1bits.POLL = 0;		// PWM L output active high

	FCLCON1bits.FLTMOD = 3;			
	
	TRGCON1 = 0;
	TRGCON1bits.TRGDIV = 0;		// trigger every 4th trigger event
	TRGCON1bits.TRGSTRT = 0;		// wait 0 pwm cycles to generate trigger
	
	TRIG1 = 0;
	STRIG1 = 0;
	LEBCON1 = 0;
}


// ****************************************************************************
//
//	Function: void Fault1Init(void)
//
// ============================================================================
//	
// ----------------------------------------------------------------------------
void Fault1Init(void) {	
																						// initial DAC output value
	CMPDAC1 = B1_OVR_THRESHOLD;					// threshhold
	
																						// CMP1A input
																						// DAC out not connected to pin
																						// internal reference
																						// output not inverted
	CMPCON1 = 0;
																						// range definition
																						// high range: max DAC value = Avdd/2
	CMPCON1 = 0x8001;
																						// remapping of fault input to comparator output
//	RPINR29bits.FLT1R = 32;
//	RPOR16bits.RP32R = 0b100111;
																						
	FCLCON1bits.FLTSRC = 0;					// fault source is Comparator 1
																						
	FCLCON1bits.FLTPOL = 1;					// fault source is active high
	
	IOCON1bits.FLTDAT = 0x01;					// 1H = low; 1L = high
	
	FCLCON1bits.FLTMOD = 1;
}