过采样oversampling为什么能够提高信噪比SNR呢?

两个问题

1. 为什么增加采样频率fs量化噪声PSD会降低?
由于量化误差可以建模为样本与样本之间不相关,因此可以等效为频率范围 [ 0 , f s 2 ] [0, \frac{f_s}{2}] [0,2fs]的“白”噪声,频率响应平坦。但由于量化噪声只与字长有关,在量化噪声功率 P n P_{n} Pn保持不变的情况下, f s f_s fs增大,单边功率谱密度将会降低:
P F D = 2 × P n f s PFD=2 \times \frac{P_n}{f_s} PFD=2×fsPn

2. 为什么增加采样频率fs对信号的功率谱密度不会变化?
因为信号样本与样本之间相关,信号能量将分布在 [ 0 , f i n ] [0, f_{in}] [0,fin]频率范围内,因此不随采样频率的变化而变化。

综上所述,如果增大采样频率,量化噪声PFD降低,信号PFD不变,所以信噪比SNR将提高。

公式推导

下面是详细的公式推导过程:
在这里插入图片描述
将量化噪声等效为白噪声,其概率分布可写为:
在这里插入图片描述
落入信号带宽内的噪声贡献为:
在这里插入图片描述
信号本身的功率以及最后计算得到的SNR为:
在这里插入图片描述
以上推导过程来源于:Integrated Circuit Design for High-Speed Frequency Synthesis

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Contents<br>Foreword xv<br>Acknowledgments xix<br>1 Introduction to Communications Circuits 1<br>1.1 Introduction 1<br>1.2 Lower Frequency Analog Design and Microwave<br>Design Versus Radio Frequency Integrated<br>Circuit Design 2<br>1.2.1 Impedance Levels for Microwave and Low-<br>Frequency Analog Design 2<br>1.2.2 Units for Microwave and Low-Frequency Analog<br>Design 3<br>1.3 Radio Frequency Integrated Circuits Used in a<br>Communications Transceiver 4<br>1.4 Overview 6<br>References 6<br>2 Issues in RFIC Design, Noise, Linearity, and<br>Filtering 9<br>2.1 Introduction 9<br>v<br><br>vi Radio Frequency Integrated Circuit Design<br>2.2 Noise 9<br>2.2.1 Thermal Noise 10<br>2.2.2 Available Noise Power 11<br>2.2.3 Available Power from Antenna 11<br>2.2.4 The Concept of Noise Figure 13<br>2.2.5 The Noise Figure of an Amplifier Circuit 14<br>2.2.6 The Noise Figure of Components in Series 16<br>2.3 Linearity and Distortion in RF Circuits 23<br>2.3.1 Power Series Expansion 23<br>2.3.2 Third-Order Intercept Point 27<br>2.3.3 Second-Order Intercept Point 29<br>2.3.4 The 1-dB Compression Point 30<br>2.3.5 Relationships Between 1-dB Compression and<br>IP3 Points 31<br>2.3.6 Broadband Measures of Linearity 32<br>2.4 Dynamic Range 35<br>2.5 Filtering Issues 37<br>2.5.1 Image Signals and Image Reject Filtering 37<br>2.5.2 Blockers and Blocker Filtering 39<br>References 41<br>Selected Bibliography 42<br>3 A Brief Review of Technology 43<br>3.1 Introduction 43<br>3.2 Bipolar Transistor Description 43Current Dependence 46<br>3.3<br>3.4 Small-Signal Model 47<br>3.5 Small-Signal Parameters 48<br>3.6 High-Frequency Effects 49<br>as a Function of Current 51<br>3.6.1 f<br>T<br>3.7 Noise in Bipolar Transistors 53<br>3.7.1 Thermal Noise in Transistor Components 53<br>3.7.2 Shot Noise 53<br>3.7.3 1/f Noise 54<br><br>vii<br>3.8 Base Shot Noise Discussion 55<br>3.9 Noise Sources in the Transistor Model 55<br>3.10 Bipolar Transistor Design Considerations 56<br>3.11 CMOS Transistors 57<br>3.11.1 NMOS 58<br>3.11.2 PMOS 58<br>3.11.3 CMOS Small-Signal Model Including Noise 58<br>3.11.4 CMOS Square Law Equations 60<br>References 61<br>4 Impedance Matching 63<br>4.1 Introduction 63<br>4.2 Review of the Smith Chart 66<br>4.3 Impedance Matching 69<br>4.4 Conversions Between Series and Parallel Resistor-<br>Inductor and Resistor-Capacitor Circuits 74<br>4.5 Tapped Capacitors and Inductors 76<br>4.6 The Concept of Mutual Inductance 78<br>4.7 Matching Using Transformers 81<br>4.8 Tuning a Transformer 82<br>4.9 The Bandwidth of an Impedance Transformation<br>Network 83<br>4.10 Quality Factor of an LC Resonator 85<br>4.11 Transmission Lines 88<br>4.12 S, Y, and Z Parameters 89<br>References 93<br>5 The Use and Design of Passive Circuit<br>Elements in IC Technologies 95<br>5.1 Introduction 95<br>5.2 The Technology Back End and Metallization in<br>IC Technologies 95<br><br>viii Radio Frequency Integrated Circuit Design<br>5.3 Sheet Resistance and the Skin Effect 97<br>5.4 Parasitic Capacitance 100<br>5.5 Parasitic Inductance 101<br>5.6 Current Handling in Metal Lines 102<br>5.7 Poly Resistors and Diffusion Resistors 103<br>5.8 Metal-Insulator-Metal Capacitors and Poly<br>Capacitors 103<br>5.9 Applications of On-Chip Spiral Inductors and<br>Transformers 104<br>5.10 Design of Inductors and Transformers 106<br>5.11 Some Basic Lumped Models for Inductors 108<br>5.12 Calculating the Inductance of Spirals 110<br>5.13 Self-Resonance of Inductors 110<br>5.14 The Quality Factor of an Inductor 111<br>5.15 Characterization of an Inductor 115<br>5.16 Some Notes About the Proper Use of Inductors 117<br>5.17 Layout of Spiral Inductors 119<br>5.18 Isolating the Inductor 121<br>5.19 The Use of Slotted Ground Shields and<br>Inductors 122<br>5.20 Basic Transformer Layouts in IC Technologies 122<br>5.21 Multilevel Inductors 124<br>5.22 Characterizing Transformers for Use in ICs 127<br>5.23 On-Chip Transmission Lines 129<br>5.23.1 Effect of Transmission Line 130<br>5.23.2 Transmission Line Examples 131<br>5.24 High-Frequency Measurement of On-Chip<br>Passives and Some Common De-Embedding<br>Techniques 134<br><br>ix<br>5.25 Packaging 135<br>5.25.1 Other Packaging Techniques 138<br>References 139<br>6 LNA Design 141<br>6.1 Introduction and Basic Amplifiers 141<br>6.1.1 Common-Emitter Amplifier (Driver) 141<br>6.1.2 Simplified Expressions for Widely Separated<br>Poles 146<br>6.1.3 The Common-Base Amplifier (Cascode) 146<br>6.1.4 The Common-Collector Amplifier (Emitter<br>Follower) 148<br>6.2 Amplifiers with Feedback 152<br>6.2.1 Common-Emitter with Series Feedback (Emitter<br>Degeneration) 152<br>6.2.2 The Common-Emitter with Shunt Feedback 154<br>6.3 Noise in Amplifiers 158<br>6.3.1 Input-Referred Noise Model of the Bipolar<br>Transistor 159<br>6.3.2 Noise Figure of the Common-Emitter Amplifier 161<br>6.3.3 Input Matching of LNAs for Low Noise 163<br>6.3.4 Relationship Between Noise Figure and Bias<br>Current 169<br>6.3.5 Effect of the Cascode on Noise Figure 170<br>6.3.6 Noise in the Common-Collector Amplifier 171<br>6.4 Linearity in Amplifiers 172<br>6.4.1 Exponential Nonlinearity in the Bipolar<br>Transistor 172<br>6.4.2 Nonlinearity in the Output Impedance of the<br>Bipolar Transistor 180<br>6.4.3 High-Frequency Nonlinearity in the Bipolar<br>Transistor 182<br>6.4.4 Linearity in Common-Collector Configuration 182<br>6.5 Differential Pair (Emitter-Coupled Pair) and<br>Other Differential Amplifiers 183<br>6.6 Low-Voltage Topologies for LNAs and the Use<br>of On-Chip Transformers 184<br><br>x Radio Frequency Integrated Circuit Design<br>6.7 DC Bias Networks 187<br>6.7.1 Temperature Effects 189<br>6.8 Broadband LNA Design Example 189<br>References 194<br>Selected Bibliography 195<br>7 Mixers 197<br>7.1 Introduction 197<br>7.2 Mixing with Nonlinearity 197<br>7.3 Basic Mixer Operation 198<br>7.4 Controlled Transconductance Mixer 198<br>7.5 Double-Balanced Mixer 200<br>7.6 Mixer with Switching of Upper Quad 202<br>7.6.1 Why LO Switching? 203<br>7.6.2 Picking the LO Level 204<br>7.6.3 Analysis of Switching Modulator 205<br>7.7 Mixer Noise 206<br>7.8 Linearity 215<br>7.8.1 Desired Nonlinearity 215<br>7.8.2 Undesired Nonlinearity 215<br>7.9 Improving Isolation 217<br>7.10 Image Reject and Single-Sideband Mixer 217<br>7.10.1 Alternative Single-Sideband Mixers 219<br>7.10.2 Generating 90° Phase Shift 220<br>7.10.3 Image Rejection with Amplitude and Phase<br>Mismatch 224<br>7.11 Alternative Mixer Designs 227<br>7.11.1 The Moore Mixer 228<br>7.11.2 Mixers with Transformer Input 228<br>7.11.3 Mixer with Simultaneous Noise and Power<br>Match 229<br>7.11.4 Mixers with Coupling Capacitors 230<br><br>xiContents<br>7.12 General Design Comments 231<br>7.12.1 Sizing Transistors 232<br>7.12.2 Increasing Gain 232<br>7.12.3 Increasing IP3 232<br>7.12.4 Improving Noise Figure 233<br>7.12.5 Effect of Bond Pads and the Package 233<br>7.12.6 Matching, Bias Resistors, and Gain 234<br>7.13 CMOS Mixers 242<br>References 244<br>Selected Bibliography 244<br>8 Voltage-Controlled Oscillators 245<br>8.1 Introduction 245<br>8.2 Specification of Oscillator Properties 245<br>8.3 The LC Resonator 247<br>8.4 Adding Negative Resistance Through Feedback<br>to the Resonator 248<br>8.5 Popular Implementations of Feedback to the<br>Resonator 250<br>8.6 Configuration of the Amplifier (Colpitts or<br>) 251<br>-G<br>m<br>8.7 Analysis of an Oscillator as a Feedback System 252<br>8.7.1 Oscillator Closed-Loop Analysis 252<br>8.7.2 Capacitor Ratios with Colpitts Oscillators 255<br>8.7.3 Oscillator Open-Loop Analysis 258<br>8.7.4 Simplified Loop Gain Estimates 260<br>8.8 Negative Resistance Generated by the Amplifier 262<br>8.8.1 Negative Resistance of Colpitts Oscillator 262<br>8.8.2 Negative Resistance for Series and Parallel<br>Circuits 263<br>Oscillator 265<br>8.8.3 Negative Resistance Analysis of -G<br>m<br>8.9 Comments on Oscillator Analysis 268<br>8.10 Basic Differential Oscillator Topologies 270<br><br>xii Radio Frequency Integrated Circuit Design<br>8.11 A Modified Common-Collector Colpitts<br>Oscillator with Buffering 270<br>Topology 270<br>8.12 Several Refinements to the -G<br>m<br>8.13 The Effect of Parasitics on the Frequency of<br>Oscillation 274<br>8.14 Large-Signal Nonlinearity in the Transistor 275<br>8.15 Bias Shifting During Startup 277<br>8.16 Oscillator Amplitude 277<br>8.17 Phase Noise 283<br>8.17.1 Linear or Additive Phase Noise and Leeson’s<br>Formula 283<br>8.17.2 Some Additional Notes About Low-Frequency<br>Noise 291<br>8.17.3 Nonlinear Noise 292<br>8.18 Making the Oscillator Tunable 295<br>8.19 VCO Automatic-Amplitude Control Circuits 302<br>8.20 Other Oscillators 313<br>References 316<br>Selected Bibliography 317<br>9 High-Frequency Filter Circuits 319<br>9.1 Introduction 319<br>9.2 Second-Order Filters 320<br>9.3 Integrated RF Filters 321<br>9.3.1 A Simple Bandpass LC Filter 321<br>9.3.2 A Simple Bandstop Filter 322<br>9.3.3 An Alternative Bandstop Filter 323<br>9.4 Achieving Filters with Higher Q 327<br>9.4.1 Differential Bandpass LNA with Q-Tuned Load<br>Resonator 327<br>9.4.2 A Bandstop Filter with Colpitts-Style Negative<br>Resistance 329<br>9.4.3 Bandstop Filter with Transformer-Coupled -G<br>m<br>Negative Resistance 331<br><br>xiiiContents<br>9.5 Some Simple Image Rejection Formulas 333<br>9.6 Linearity of the Negative Resistance Circuits 336<br>9.7 Noise Added Due to the Filter Circuitry 337<br>9.8 Automatic Q Tuning 339<br>9.9 Frequency Tuning 342<br>9.10 Higher-Order Filters 343<br>References 346<br>Selected Bibliography 347<br>10 Power Amplifiers 349<br>10.1 Introduction 349<br>10.2 Power Capability 350<br>10.3 Efficiency Calculations 350<br>10.4 Matching Considerations 351<br>*<br>Versus Matching to<br>352<br>10.4.1 Matching to S<br>22 opt<br>10.5 Class A, B, and C Amplifiers 353<br>10.5.1 Class A, B, and C Analysis 356<br>10.5.2 Class B Push-Pull Arrangements 362<br>10.5.3 Models for Transconductance 363<br>10.6 Class D Amplifiers 367<br>10.7 Class E Amplifiers 368<br>10.7.1 Analysis of Class E Amplifier 370<br>10.7.2 Class E Equations 371<br>10.7.3 Class E Equations for Finite Output Q 372<br>10.7.4 Saturation Voltage and Resistance 373<br>10.7.5 Transition Time 373<br>10.8 Class F Amplifiers 375<br>10.8.1 Variation on Class F: Second-Harmonic Peaking 379<br>10.8.2 Variation on Class F: Quarter-Wave<br>Transmission Line 379<br>10.9 Class G and H Amplifiers 381<br>10.10 Class S Amplifiers 383<br><br>xiv Radio Frequency Integrated Circuit Design<br>10.11 Summary of Amplifier Classes for RF Integrated<br>Circuits 384<br>10.12 AC Load Line 385<br>10.13 Matching to Achieve Desired Power 385<br>10.14 Transistor Saturation 388<br>10.15 Current Limits 388<br>10.16 Current Limits in Integrated Inductors 390<br>10.17 Power Combining 390<br>10.18 Thermal Runaway—Ballasting 392<br>10.19 Breakdown Voltage 393<br>10.20 Packaging 394<br>10.21 Effects and Implications of Nonlinearity 394<br>10.21.1 Cross Modulation 395<br>10.21.2 AM-to-PM Conversion 395<br>10.21.3 Spectral Regrowth 395<br>10.21.4 Linearization Techniques 396<br>10.21.5 Feedforward 396<br>10.21.6 Feedback 397<br>10.22 CMOS Power Amplifier Example 398<br>References 399<br>About the Authors 401<br>Index 403

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