PCIE EP controller databook学习

1. PCIE结构总览

2. 各个模块的作用

2.1 Common Express Port Logic(CXPL)Module

• 实现了PCIE  TL/DL/PL 层的基本功能
• 实现了TL/DL层大部分以及PL层中的MAC部分的逻辑，包括link training和LTSSM
• CXPL通过PIPE接口与PHY连接

2.2 Transmit Application-Dependent Module(XADM)

• TLP arbitration
• TLP Formation
• Flow Control(FC) Credit checking

2.3 Recieve Application-Dependent Module(RADM)

• Sorting/filtering of recieved TLPs
• Buffering and queuing of recieved TLPs
• Routing of recieved TLP to the controller's recieve interfaces.

2.4 Configuration-Dependent Module(CDM)

• Standard PCIE configuration space
• Controller-specific register space(Port Logic Registers)

2.5 Power Management Controller(PMC) 

• implements the power management features of the controller

2.6 Local Bus Controller(LBC) and Data Bus Interface(DBI)

• Internal registers(in the CDM)
• External application registers connected externally to the ELBI

2.7 Message Generation Module(MSG_GEN)

• transmit messages generated by the controller

3. EP Controller block diagram

3.1 without AXI bridge

3.2 with AXI bridge