Key features of the Cortex-A family of devices:
- Scalable clusters supporting single and multi-core configurations
- RISC cores with support for Armv7-A and Armv8-A architecture
- Full backward compatibility with code from previous Arm processors
- VFP and Neon units to execute floating-point and Advanced SIMD instruction sets
- Optional cryptographic accelerator engines supporting algorithms like AES, SHA1, and SHA2-256
- Memory Management Unit (MMU) supporting virtual address and physical address spaces with various page sizes
- Hardware translation table walking for virtual to physical address translation
- Big-endian and little-endian data access support
- Unaligned access support for basic load/store instructions
armv7
The Armv7-A architecture introduces the concept of architecture profiles, a c