目录
TMDS编码源码
module TMDS_Encoder(
rst,
clk,
de,
d,
c0,
c1,
q_out);
input rst;
input clk;
input de, c0, c1;
input[7:0] d;
output reg[9:0] q_out;
reg[9:0] q_m;
reg[7:0] cnt;
wire[3:0] num0d, num1d, num0q_m, num1q_m;
assign num0d = {3'd0,1'b0 ~^ d[0]} + {3'd0,1'b0 ~^ d[1]} + {3'd0,1'b0 ~^ d[2]} + {3'd0,1'b0 ~^ d[3]} + {3'd0,1'b0 ~^ d[4]} + {3'd0,1'b0 ~^ d[5]} + {3'd0,1'b0 ~^ d[6]} + {3'd0,1'b0 ~^ d[7]};
assign num1d = {3'd0,1'b1 ~^ d[0]} + {3'd0,1'b1 ~^ d[1]} + {3'd0,1'b1 ~^ d[2]} + {3'd0,1'b1 ~^ d[3]} + {3'd0,1'b1 ~^ d[4]} + {3'd0,1'b1 ~^ d[5]} + {3'd0,1'b1 ~^ d[6]} + {3'd0,1'b1 ~^ d[7]};
assign num0q_m = {3'd0,1'b0 ~^ q_m[0]} + {3'd0,1'b0 ~^ q_m[1]} + {3'd0,1'b0 ~^ q_m[2]} + {3'd0,1'b0 ~^ q_m[3]} + {3'd0,1'b0 ~^ q_m[4]} + {3'd0,1'b0 ~^ q_m[5]} + {3'd0,1'b0 ~^ q_m[6]} + {3'd0,1'b0 ~^ q_m[7]};
assign num1q_m = {3'd0,1'b1 ~^ q_m[0]} + {3'd0,1'b1 ~^ q_m[1]} + {3'd0,1'b1 ~^ q_m[2]} + {3'd0,1'b1 ~^ q_m[3]} + {3'd0,1'b1 ~^ q_m[4]} + {3'd0,1'b1 ~^ q_m[5]} + {3'd0,1'b1 ~^ q_m[6]} + {3'd0,1'b1 ~^ q_m[7]};
always @(*)
begin
if((num1d > 8'h4) || ((num1d == 8'h4) && (d[0] == 1'b0)))
begin
q_m[0] = d[0];
q_m[1] = q_m[0] ~^ d[1];
q_m[2] = q_m[1] ~^ d[2];
q_m[3] = q_m[2] ~^ d[3];
q_m[4] = q_m[3] ~^ d[4];
q_m[5] = q_m[4] ~^ d[5];
q_m[6] = q_m[5] ~^ d[6];
q_m[7] = q_m[6] ~^ d[7];
q_m[8] = 1'b0;
end
else
begin
q_m[0] = d[0];
q_m[1] = q_m[0] ^ d[1];
q_m[2] = q_m[1] ^ d[2];
q_m[3] = q_m[2] ^ d[3];
q_m[4] = q_m[3] ^ d[4];
q_m[5] = q_m[4] ^ d[5];
q_m[6] = q_m[5] ^ d[6];
q_m[7] = q_m[6] ^ d[7];
q_m[8] = 1'b1;
end
end
always @(posedge clk)
begin
if(rst)
begin
q_out <= 10'b1111111111;
cnt <= 8'h00;
end
else if(de)
begin
if((cnt == 8'h00) || (num1q_m == num0q_m))
begin
q_out[9] <= ~q_m[8];
q_out[8] <= q_m[8];
q_out[7:0] <= q_m[8] ? q_m[7:0] : ~q_m[7:0];
if(q_m[8] == 1'b0)
cnt <= cnt + (num0q_m - num1q_m);
else
cnt <= cnt + (num1q_m - num0q_m);
end
else if(((cnt[7] == 1'b0) && (num1q_m > num0q_m)) || ((cnt[7] == 1'b1) && (num0q_m > num1q_m)))
begin
q_out[9] <= 1'b1;
q_out[8] <= q_m[8];
q_out[7:0] <= ~q_m[7:0];
cnt <= cnt + (q_m[8] << 1) + (num0q_m - num1q_m);
end
else
begin
q_out[9] <= 1'b0;
q_out[8] <= q_m[8];
q_out[7:0] <= q_m[7:0];
cnt <= cnt - (~q_m[8] << 1) + (num1q_m - num0q_m);
end
end
else
begin
if((c1 == 1'b0) && (c0 == 1'b0))
q_out <= 10'b1101010100;
else if((c1 == 1'b0) && (c0 == 1'b1))
q_out <= 10'b0010101011;
else if((c1 == 1'b1) && (c0 == 1'b0))
q_out <= 10'b0101010100;
else
q_out <= 10'b1010101011;
end
end
endmodule
TMDS解码源码
module TMDS_Decoder(
rst,
clk,
d,
c0,
c1,
de,
q);
input rst;
input clk;
input[9:0] d;
output reg c0, c1, de;
output reg[7:0] q;
wire[9:0] nd;
assign nd = ~d;
always @(posedge clk)
begin
if(d == 10'b1101010100)
begin
c1 <= 1'b0;
c0 <= 1'b0;
de <= 1'b0;
end
else if(d == 10'b0010101011)
begin
c1 <= 1'b0;
c0 <= 1'b1;
de <= 1'b0;
end
else if(d == 10'b0101010100)
begin
c1 <= 1'b1;
c0 <= 1'b0;
de <= 1'b0;
end
else if(d == 10'b1010101011)
begin
c1 <= 1'b1;
c0 <= 1'b1;
de <= 1'b0;
end
else if(d[8] == 1'b1)
begin
if(d[9] == 1'b1)
begin
q[0] <= nd[0];
q[1] <= nd[1] ^ nd[0];
q[2] <= nd[2] ^ nd[1];
q[3] <= nd[3] ^ nd[2];
q[4] <= nd[4] ^ nd[3];
q[5] <= nd[5] ^ nd[4];
q[6] <= nd[6] ^ nd[5];
q[7] <= nd[7] ^ nd[6];
end
else
begin
q[0] <= d[0];
q[1] <= d[1] ^ d[0];
q[2] <= d[2] ^ d[1];
q[3] <= d[3] ^ d[2];
q[4] <= d[4] ^ d[3];
q[5] <= d[5] ^ d[4];
q[6] <= d[6] ^ d[5];
q[7] <= d[7] ^ d[6];
end
de <= 1'b1;
end
else
begin
if(d[9] == 1'b1)
begin
q[0] <= nd[0];
q[1] <= nd[1] ~^ nd[0];
q[2] <= nd[2] ~^ nd[1];
q[3] <= nd[3] ~^ nd[2];
q[4] <= nd[4] ~^ nd[3];
q[5] <= nd[5] ~^ nd[4];
q[6] <= nd[6] ~^ nd[5];
q[7] <= nd[7] ~^ nd[6];
end
else
begin
q[0] <= d[0];
q[1] <= d[1] ~^ d[0];
q[2] <= d[2] ~^ d[1];
q[3] <= d[3] ~^ d[2];
q[4] <= d[4] ~^ d[3];
q[5] <= d[5] ~^ d[4];
q[6] <= d[6] ~^ d[5];
q[7] <= d[7] ~^ d[6];
end
de <= 1'b1;
end
end
endmodule