touch-screen with Timer

 在触屏驱动的基础上，添加定时器轮询机制，驱动初始化时，一并初始化定时器， 在第一次tc中断里面开启定时器并且关闭了tc中断， 并在定时器函数里面判断按键状态，如确定此时按键还是按下状态，就启动adc， 开始adc记次的中断，在adc次数到达之后，再次启动定时器，并且将触摸屏重新设置成tc等待中断模式，这样在定时器函数里面可以判断按键是否抬起，进而是结束本次按键并开启tc中断还是继续计数所按下的键值。

这里一共留下了两个参数可以设置，一个是键按下后间隔多长时间扫描一次，即定时器的间隔时间， 另一个是扫描键值需要多少次ad转换，即adc中断的记次数。

 

此处奇怪： 按常理来说读取ADCDAT0的按键状态应该在等待中断模式下，但是我在定时器里面读的时候，提前设置成等待中断模式就不行， 但是在ADC中断函数退出时设置就有效，奇怪！

request_irq(, , , ,"name", id)

free_irq(, id);

id需要成对出现！

 

// ISR static irqreturn_t irq_isr_adc(int irq, void *dev_id) { static int cnt = 0; unsigned long data0; unsigned long data1; data0 = ioread32(reg_base + S3C2410_ADCDAT0); data1 = ioread32(reg_base + S3C2410_ADCDAT1); printk(KERN_ALERT"data0=%x , data1=%x ,| %d, %d | /n", (int)data0, (int)data1, (int)data0&0x3ff, (int)data1&0x3ff); //printk(KERN_ALERT"Now1 ADCTSC=%x, ADCCON=%x /n",ioread32(reg_base+S3C2410_ADCTSC), ioread32(reg_base + S3C2410_ADCCON)); /* //clear interrupt flag iowrite32((0x1<<10) , reg_irq_base + 0x18); iowrite32((0x1<<31) , reg_irq_base + 0x0); iowrite32((0x1<<31) , reg_irq_base + 0x10); */ cnt++; if(cnt < 4) { iowrite32(S3C2410_ADCTSC_PULL_UP_DISABLE |AUTOPST , reg_base + S3C2410_ADCTSC); iowrite32(ioread32(reg_base+S3C2410_ADCCON)|(0x1), reg_base + S3C2410_ADCCON); //ADCON } else { cnt = 0; mod_timer(&timer, jiffies + HZ); iowrite32(WAIT4INT(0), reg_base + S3C2410_ADCTSC); // this is the key ！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！ 此处奇怪： 按常理来说读取ADCDAT0的按键状态应该在等待中断模式下，但是我在定时器里面读的时候，提前设置成等待中断模式就不行， 但是在ADC中断函数退出时设置就有效，奇怪！ ！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！！ } return 1; } static void ts_timer(unsigned long data) { unsigned int data0; unsigned int data1; int updown = 0; //iowrite32(WAIT4INT(0), reg_base + S3C2410_ADCTSC); //0x0d3 this raw should be put in adc_irq ! //iowrite32(ioread32(reg_base + S3C2410_ADCTSC) | 0x03, reg_base + S3C2410_ADCTSC); //0x0d3 printk(KERN_ALERT"/nS3C2410_ADCTSC = %x /n", ioread32(reg_base + S3C2410_ADCTSC)); data0 = ioread32(reg_base + S3C2410_ADCDAT0); data1 = ioread32(reg_base + S3C2410_ADCDAT1); printk(KERN_ALERT"TS:data0=%x , data1=%x ,| %d, %d | /n", (int)data0, (int)data1, (int)data0&0x3ff, (int)data1&0x3ff); updown = (!(data0 & S3C2410_ADCDAT0_UPDOWN)) && (!(data1 & S3C2410_ADCDAT0_UPDOWN)); if(updown) { printk(KERN_ALERT"ts_timer 1 /n"); //disable XP pull-up, enable auto x/y convert iowrite32(S3C2410_ADCTSC_PULL_UP_DISABLE |AUTOPST , reg_base + S3C2410_ADCTSC); iowrite32(ioread32(reg_base+S3C2410_ADCCON)|(0x1), reg_base + S3C2410_ADCCON); //ADCON } else { printk(KERN_ALERT"ts_timer 2 /n"); enable_irq(IRQ_TC); } } static irqreturn_t irq_isr_tc(int irq, void *dev_id) { unsigned long data0; unsigned long data1; int updown = 0; data0 = ioread32(reg_base + S3C2410_ADCDAT0); data1 = ioread32(reg_base + S3C2410_ADCDAT1); updown = (!(data0 & S3C2410_ADCDAT0_UPDOWN)) && (!(data1 & S3C2410_ADCDAT0_UPDOWN)); if(!updown) { return 1; } disable_irq_nosync(IRQ_TC); //DISABLE irq_tc mod_timer(&timer, jiffies + HZ); return 1; /* printk(KERN_ALERT"TC_in ADCTSC=%x, ADCCON=%x /n",ioread32(reg_base+S3C2410_ADCTSC), ioread32(reg_base + S3C2410_ADCCON)); //clear interrupt flag iowrite32((0x1<<9) , reg_irq_base + 0x18); iowrite32((0x1<<31) , reg_irq_base + 0x0); iowrite32((0x1<<31) , reg_irq_base + 0x10); printk(KERN_ALERT"TC_out ADCTSC=%x, ADCCON=%x /n",ioread32(reg_base+S3C2410_ADCTSC), ioread32(reg_base + S3C2410_ADCCON)); return 1; */ } static int interrupt_init(void) { int ret; //set pin config s3c2410_gpio_cfgpin(S3C2410_GPG12, S3C2410_GPG12_XMON); s3c2410_gpio_cfgpin(S3C2410_GPG13, S3C2410_GPG13_nXPON); s3c2410_gpio_cfgpin(S3C2410_GPG14, S3C2410_GPG14_YMON); s3c2410_gpio_cfgpin(S3C2410_GPG15, S3C2410_GPG15_nYPON); //request iomem reg_base = ioremap(S3C2410_PA_ADC, 0x20); if(!reg_base) { printk(KERN_ALERT"IOREMAP Error ! /n"); } reg_irq_base = ioremap(S3C2410_PA_IRQ, 0x20); if(!reg_irq_base) { printk(KERN_ALERT"IOREMAP Error ! /n"); } //set reg iowrite32(S3C2410_ADCCON_PRSCEN | S3C2410_ADCCON_PRSCVL(0xFF), reg_base + S3C2410_ADCCON); iowrite32(0xffff, reg_base + S3C2410_ADCDLY); iowrite32(WAIT4INT(0), reg_base + S3C2410_ADCTSC); //0x0d3 //------------------------------------------------------------------------ //request interrupt if((ret = request_irq(IRQ_ADC, irq_isr_adc, IRQF_SHARED|IRQF_SAMPLE_RANDOM, "sharpzou-Adc", ts_devp)) != 0) printk(KERN_ALERT"irq_adc REQUEST_IRQ Fail %d ! /n", ret); if( (ret = request_irq(IRQ_TC, irq_isr_tc, IRQF_SAMPLE_RANDOM | IRQF_SHARED, "sharpzou-TouchS ", ts_devp)) != 0) { printk(KERN_ALERT"REQUEST_IRQ Fail %d ! /n", ret); } return ret; } //put device init in open static int ts_open(struct inode *inode, struct file *filp) { int ret = 0; //led debug printk(KERN_ALERT"This is ts_open !/n"); s3c2410_gpio_setpin(S3C2410_GPB5, 1); s3c2410_gpio_setpin(S3C2410_GPB6, 1); s3c2410_gpio_setpin(S3C2410_GPB7, 0); s3c2410_gpio_setpin(S3C2410_GPB8, 0); // for touch screen interrupt init // the pin not need ioromap becase it is packed by kernel, and thr register // need to be ioremap interrupt_init(); return ret; } static int touch_screen_init(void) { int ret; int dev_major; //alloc device numb if((ret = alloc_chrdev_region(&dev, 0, 1, "sharp-touch-screen")) != 0) { printk(KERN_ALERT" alloc_chrdev_region FAILURE ERROR!/n"); return ret; } printk(KERN_ALERT"Alloc_chrdev_region OK ! /n Major numb: %d, Minor numb: %d/n", MAJOR(dev), MINOR(dev)); printk(KERN_ALERT"You should mknod /dev/sharp-ts c %d %d/n", MAJOR(dev), MINOR(dev)); //alloc dev mem ts_devp = kmalloc(sizeof(struct TS_DEV), GFP_KERNEL); if(!ts_devp) { printk(KERN_ALERT"ts_devp kmalloc FAILURE!/n"); goto Fail_kmalloc; } memset(ts_devp, 0, sizeof(struct TS_DEV)); //dev register cdev_init(&ts_devp->cdev, &ts_fops); ts_devp->cdev.owner = THIS_MODULE; dev_major = MAJOR(dev); ret = cdev_add(&ts_devp->cdev, MKDEV(dev_major, 0), 1); if(ret) { printk(KERN_ALERT"cdev_add Failure Quit!/n"); goto Fail_cdev_add; } // !!! very important !!! adc_ts_clock = clk_get(NULL, "adc"); if(!adc_ts_clock) { printk(KERN_ALERT"CAN'T get clock source!/n"); return -1; } clk_enable(adc_ts_clock); //register timer setup_timer(&timer, ts_timer, NULL); //led display trace s3c2410_gpio_cfgpin(S3C2410_GPB5, S3C2410_GPB5_OUTP); s3c2410_gpio_cfgpin(S3C2410_GPB6, S3C2410_GPB6_OUTP); s3c2410_gpio_cfgpin(S3C2410_GPB7, S3C2410_GPB7_OUTP); s3c2410_gpio_cfgpin(S3C2410_GPB8, S3C2410_GPB8_OUTP); s3c2410_gpio_setpin(S3C2410_GPB5, 0); s3c2410_gpio_setpin(S3C2410_GPB6, 1); s3c2410_gpio_setpin(S3C2410_GPB7, 1); s3c2410_gpio_setpin(S3C2410_GPB8, 1); printk(KERN_ALERT"MODULE INIT OK!/n"); return 0; Fail_cdev_add: kfree(ts_devp); Fail_kmalloc: unregister_chrdev_region(dev, 1); return -1; }