## Pipeline Register
在 Scan Compressor/Decompressor and Port之间添加一个pipeline register,以用于减少from/to chip port的long timing path。
set_dft_configuration –pipeline_scan_data enable set_pipeline_scan_data_configuration \
-tail_pipeline_stages 1 \
-head_pipeline_stages 0 \
-head_scan_flop false
or:
如果需要给pipeline FF 指定时钟的话,可以采用如下方式:
set_dft_configuration –pipeline_scan_data enable
set_pipeline_scan_data_configuration \
-head_pipeline_stages 1 \
-head_pipeline_clock SCLK \
-