Memory Hierarchy
- Block (line) unit of copying, may be not single word
- miss ratio = #miss / #access
- hit ratio = 1 - miss ratio = #hit / #access
- Temporal locality, spatial locality
- hierarchy and latency: register(1 cycle) → L1 data or instruction Cache(2)→ L2 cache(15) → Memory(300) → Disk(10M)
Memory Structure
- Address is index used to locate, not stored in memory. (unit can be byte or word)
- Larger blocks should reduce miss rate. But too large blocks means few number (more competition and more miss rate), and large miss penalty.
Cache原理
- cache,高速缓冲存储器,位于CPU和主存储器之间DRAM,规模较小,速度较快,通常由SRAM构成。
- 简单的cache基本原理:每次请求一个字,每个块也由一个单独的字组成。如果cache中没有要访问的数据导致缺失就从主存调入cache,如果cache中对应位置已经有数据则发生替换。(局部性原理进行预测最重要的例子)
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