NAND FLASH

NAND FLASH控制器：

接. 口：nFCE CLE   ALE  nFRE nFWE FRnB I/O0-I/O15   nand flash controller的对外接口

During reset, Nand flash controller will get information about the connected NAND flash through Pin status
(NCON(Adv flash), GPG13(Page size), GPG14(Address cycle), GPG15(Bus width) – refer to PIN
CONFIGURATION), After power-on or system reset is occurred, the NAND Flash controller load automatically the 4-
KBytes boot loader codes. After loading the bootloader codes, the boot loader code in steppingstone is executed

 

 

 

S3C2440A supports only software mode access. Using this mode, you can completely access the NAND flash
memory.   The NAND Flash Controller supports direct access interface with the NAND flash memory.

1.  Writing to the command register = the NAND Flash Memory command cycle

2.  Writing to the address register = the NAND Flash Memory address cycle

3.  Writing to the data register = write data to the NAND Flash Memory (write cycle)

4.  Reading from the data register = read data from the NAND Flash Memory (read cycle)

5.  Reading main ECC registers and Spare ECC registers = read data from the NAND Flash Memory

                                                        NOTE

    In the software mode, you have to check the RnB status input pin by using polling or interrupt.

 

注意：NFDATA寄存器是一个32位的寄存器，读一次能获得4个字节的数据，可以将NFDATA变成一字节的buf