BCD码 模24计数器

module BCDmount(clk,clr,dout,cout);
input clk,clr;
output reg[7:0] dout;
output reg cout;
always@(posedge clk,posedge clr)
begin
  if(clr) dout=0;
  else 
    begin
			if(dout[7:4]==2&&dout[3:0]==3)
			  begin
			     cout=1;dout=0;
			  end
			else 
			  begin
			    if(dout[3:0]==9)
				    begin
					   dout[3:0]=0;
						dout[7:4]=dout[7:4]+1;
					 end
				 else
				   dout[3:0]=dout[3:0]+1;
			  end
	 end
end
endmodule