PCIE标准共享,以及其机械尺寸图

这篇博客记录了一张机械尺寸图,旨在方便后续的PCB封装绘制。文中提到了pcb的特定厚度要求,强调了这些细节对于设计的重要性。作者anlog在2021年12月9日进行了此记录。

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标准共享链接

链接:链接:https://pan.baidu.com/s/1VCeIt28VuiXiyI8Mh7iPvg 
提取码:uzlt 

机械尺寸图

 记录机械图主要是方便后续绘制封装。

pcb其他尺寸

注意图中pcb厚度要求

特此记录

anlog

2021年12月9日

Traditional multi-drop, parallel bus technology is approaching its practical performance limits. It is clear that balancing system performance requires I/O bandwidth to scale with processing and application demands. There is an industry mandate to re-engineer I/O connectivity within cost constraints. PCI Express comprehends the many I/O requirements presented across the spectrum of computing and communications platforms, and rolls them into a common scalable and extensible I/O industry specification. Alongside these increasing performance demands, the enterprise server and communications markets have the need for improved reliability, security, and quality of service guarantees. This specification will therefore be applicable to multiple market segments. Technology advances in high-speed, point-to-point interconnects enable us to break away from the bandwidth limitations of multi-drop, parallel buses. The PCI Express basic physical layer consists of a differential transmit pair and a differential receive pair. Dual simplex data on these point-to-point connections is self-clocked and its bandwidth increases linearly with interconnect width and frequency. PCI Express takes an additional step of including a message space within its bus protocol that is used to implement legacy “side- band” signals. This further reduction of signal pins produces a very low pin count connection for components and adapters. The PCI Express Transaction, Data Link, and Physical Layers are optimized for chip-to-chip and board-to-board interconnect applications. An inherent limitation of today’s PCI-based platforms is the lack of support for isochronous data delivery, an attribute that is especially important to streaming media applications. To enable these emerging applications, PCI Express adds a virtual channel mechanism. In addition to use for support of isochronous traffic, the virtual channel mechanism provides an infrastructure for future extensions in supporting new applications. By adhering to the PCI Software Model, today’s applications are easily migrated even as emerging applications are enabled.
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