数字集成电路面试常见问题_关于空间级集成电路的常见误解

数字集成电路面试常见问题

对集成电路辐射硬度的常见误解 (Common misconceptions on the radiation hardness of integrated circuits)

Space exploration was always fascinating, and recent developments have reignited the interest to the heights never seen since the last man stood on the Moon. People argue about Mars exploration and features of spaceships as their grandparents would’ve done if the internet existed fifty years ago. I’m an electronics engineer working in the aerospace industry, so I know a thing or two about the technical background of this stuff — and I see that these things aren’t common knowledge, and people often have significantly skewed ideas about the reasons behind some devices and decisions. Namely, I’d love to speak about some misconceptions related to radiation hardened integrated circuits and the means of their protection against radiation-induced damage. But, I warn you, this text will be relatively long.

太空探索总是令人着迷，最近的发展使人们对自最后一个人站在月球上以来从未见过的高度重新产生了兴趣。 人们争论着火星的探索和宇宙飞船的特征，就像互联网在五十年前存在时他们的祖父母所做的那样。 我是航空航天业的电子工程师，所以我对这些技术的背景知识了解一两件事，而且我发现这些知识不是常识，人们通常对背后的原因有明显的偏见一些设备和决定。 即，我很想谈谈与辐射硬化集成电路有关的一些误解，以及防止辐射引起的损害的保护手段。 但是，我警告您，这段文字会比较长。

我为什么要写这个？ (Why do I write this?)

The most popular theses about radiation hardness of ICs are the following:

关于IC辐射硬度的最受欢迎的论文如下：

1. Radiation hardened chips are not needed at all. CubeSats are just fine with chips from the nearest store, very ordinary Lenovo laptops work on the ISS without any problems, and even NASA-commissioned Orion onboard computer is based on a commercial microprocessor!

   根本不需要经过辐射硬化的芯片。 CubeSats可以与附近商店的芯片配合使用，非常普通的Lenovo笔记本电脑可以在ISS上正常工作，甚至NASA委托的Orion车载计算机都基于商用微处理器！

2. Satellites don’t need computational power, but they need these magical radiation hardened chips, so most of them use very old but extremely robust designs from the eighties, like TTL quad NAND gates.

   卫星不需要计算能力，但是它们需要这些神奇的辐射硬化芯片，因此大多数卫星都使用80年代的非常古老但极其坚固的设计，例如TTL四与非门。

3. A thesis that complements the previous one: it is impossible to achieve radiation hardness on modern process nodes. Ionizing particles just tear small transistors apart. So, the use of these TTL NAND gates is not just justified, it’s the only way to go.

   这是对前一个论文的补充：在现代Craft.io节点上不可能达到辐射硬度。 电离粒子只会将小的晶体管撕开。 因此，使用这些TTL NAND门并不合理，这是唯一的方法。

4. It’s necessary and sufficient to use silicon on insulator (SOI) or silicon on sapphire (SOS) technology to achieve radiation hardness.

   必须使用绝缘体上硅(SOI)或蓝宝石上硅(SOS)技术来达到辐射硬度。

5. All military-grade chips are radiation hardened and all radiation hardened chips are military-grade. If you have a military-grade IC, you can safely launch it into outer space.

   所有军用级芯片都经过辐射硬化，所有防辐射芯片都经过了军工级认证。 如果您拥有军用级IC，则可以安全地将其发射到太空中。

As one can see, these theses directly contradict each other — which makes arguing on the internet even funnier, especially if you take into account that not a single one of them is true.

可以看到，这些论点直接相互矛盾，这使在互联网上争论变得更加有趣，尤其是如果考虑到其中没有一个是真的。

Let’s start with an important disclaimer: radiation hardness is not the Holy Grail of integrated design for space and other similar environments. It’s just a bunch of checkboxes in the long requirements list, which typically includes reliability, longevity, wide temperature range, tolerance to electrostatic discharge, vibrations and many more. Everything that can compromise reliable functioning through the entire lifetime is important, and most applications requiring radiation tolerance also assume the impossibility of repair or replacement. On the other hand, if something is wrong with one of the parameters, system-level designers of the final can often find a workaround — tighten temperature requirements, use cold spares or additional protection circuitry — whatever is suitable. The same approach can be fine when dealing with radiation effects: majority voting, supply current control and reset are very common means that are often effective. But it's also often when a brand new radiation hardened IC is the only good way to meet mission requirements.

让我们从一个重要的免责声明开始：辐射硬度不是用于太空和其他类似环境的集成设计的圣杯。 在很长的要求列表中，它只是一堆复选框，通常包括可靠性，寿命，宽温度范围，对静电放电的耐受性，振动等等。 在整个生命周期内都会影响可靠功能的所有因素都很重要，并且大多数需要防辐射的应用也都认为不可能进行修理或更换。 另一方面，如果其中一个参数出了点问题，则最终的系统级设计人员通常可以找到解决方法-严格控制温度，使用冷备件或附加保护电路-适用。 处理辐射效应时，可以使用相同的方法：多数表决，电源电流控制和重置是非常有效的非常普遍的方法。 但是，通常只有全新的辐射硬化IC是满足任务要求的唯一好方法。

It is also useful to remember that the developers of special-purpose systems are the same people as any other developers. Just like anyone else, they normally write code filled with crutches to be ready for yesterday's deadline and want more powerful hardware to mask their sloppy job; some would’ve used Arduino if it was properly certified. And it’s also obvious that people who create requirements are rarely really concerned with any limitations and want to have the same as in commercial systems, but more reliable and radhard. Therefore, modern processes are more than welcome in radhard electronics — system designers would love to have large amounts of DRAM, multi-core processors, and the most advanced FPGAs. I have already mentioned that there could be workarounds for mediocre radiation tolerance, so the use of commercial chips is mostly limited by the lack of data on what problems are than by the problems themselves or by the commercial status of the chips.

记住，专用系统的开发人员与任何其他开发人员都是同一个人，这也很有用。 就像其他任何人一样，他们通常会写满拐杖的代码，以准备在昨天的截止日期前完成工作，并希望有更强大的硬件来掩盖他们的草率工作。 如果经过适当的认证，有些人会使用Arduino。 同样显而易见的是，创建需求的人很少真正关心任何限制，并希望与商业系统中的局限性相同，但更可靠，更可靠。 因此，现代Craft.io在radhard电子产品中非常受欢迎-系统设计人员希望拥有大量DRAM，多核处理器和最先进的FPGA。 我已经提到过，对于中等的辐射耐受性可能存在变通办法，因此商用芯片的使用主要受到缺乏关于什么问题的数据的限制，而不是受到问题本身或芯片商业地位的限制。

什么是辐射效应 (What are radiation effects)

The very concepts of "radiation hardness" and "radiation hardened IC" are enormous simplifications. There are many different sources of ionizing and non-ionizing radiation, and they affect the functioning of microelectronic devices in multiple ways. The tolerance to different sets of conditions and varying levels of exposure for different applications is not the same, so a “radiation hardened” circuit designed for low earth orbit is absolutely not obliged to work in a robot parsing debris in Chernobyl or Fukushima.

“辐射硬度”和“辐射硬化IC”这两个概念非常简化。 电离辐射和非电离辐射有许多不同的来源，它们以多种方式影响微电子设备的功能。 对于不同的条件，对于不同的条件集和不同的暴露水平，其容忍度是不一样的，因此，绝对不需要在切尔诺贝利或福岛的机器人中使用为低地球轨道设计的“辐射硬化”电路来解析碎片。

Ionizing radiation is called so because the deceleration of an incoming particle in a substance releases the energy and ionizes the substance. Each material has its own energy required for ionization and the creation of an electron-hole pair. For silicon it is 3.6 eV, for its oxide — 17 eV, for gallium arsenide — 4.8 eV. The energy release can also “shift” an atom out of the correct place in the crystal lattice (21 eV must be transferred to shift a silicon atom). Electron-hole pairs created in a substance can produce different effects in an integrated circuit. Therefore, radiation effects can be divided into the four large groups: the effects of total ionizing dose (TID), the dose rate effects, single event effects (SEE), and the non-ionizing effects called the displacement damage. This separation is somewhat arbitrary: for example, irradiation with a stream of heavy ions causes both single event effects and accumulation of a total ionizing dose.

之所以称为电离辐射，是因为物质中传入粒子的减速会释放能量并使物质离子化。 每种材料都有其自身的能量，这些能量用于电离和创建电子-空穴对。 硅为3.6 eV，氧化物为17 eV，砷化镓为4.8 eV。 能量释放还可以使原子“移出”晶格中的正确位置(必须转移21 eV才能移出硅原子)。 在物质中产生的电子-空穴对可以在集成电路中产生不同的效果。 因此，辐射效应可分为四大类：总电离剂量(TID)效应，剂量率效应，单事件效应(SEE)和称为位移损伤的非电离效应。 这种分离在某种程度上是任意的：例如，重离子流的照射会导致单事件效应和总电离剂量的累积。

总电离剂量 (Total ionizing dose)

The total absorbed dose of radiation is measured in units called “rad”, with an indication of the substance absorbing the radiation. 1 rad = 0.01 J/kg, it’s the amount of energy released in an elementary unit of weight in a given substance. Gray, which is a 100 rad (or 1 J/kg) is another, albeit, rarer unit. It is somewhat important to understand the same amount of ionizing particles released by a source of radiation (called radiation exposure) will be translated into different levels of absorbed dose in different substances. The material of choice for silicon ICs is silicon oxide. That’s because very low hole mobility in SiO2 causes charge accumulation in oxide producing various total dose effects. Typical dose levels for commercial circuits are in the range of 5-100 krad (SiO2). The levels that are in actual demand for some practical applications start around 30 krad (SiO2) and go as far as a few Grad (SiO2), depending on the purpose of the chip. Yes, Gigarads. The lethal dose for a human is around 6 Gray.

辐射的总吸收剂量以称为“ rad”的单位进行测量，并指示吸收辐射的物质。 1 rad = 0.01 J / kg，它是指定物质中基本重量单位释放的能量。 灰色是100弧度(或1焦耳/千克)，是另一个虽然较稀有的单位。 了解辐射源释放的相同数量的电离颗粒(称为辐射暴露)将转化为不同物质中不同剂量的吸收剂量，这一点有点重要。 硅IC的选择材料是氧化硅。 这是因为SiO2中非常低的空穴迁移率会导致氧化物中的电荷积累，从而产生各种总剂量效应。 商业电路的典型剂量水平在5-100 krad(SiO2)的范围内。 在某些实际应用中，实际需要的电平大约为30 krad(SiO2)，最高可达几个Grad(SiO2)，具体取决于芯片的用途。 是的，吉加拉德。 一个人的致死剂量约为6格雷。

The TID effects are mostly associated with the accumulation of positive charge in dielectrics. They manifest themselves in CMOS circuits in several main ways:

TID效应主要与电介质中正电荷的积累有关。 它们以几种主要方式出现在CMOS电路中：

1. Threshold voltage shift. For n-channel transistors, the threshold is usually reduced (but the dependence may be non-monotonic, especially at high doses), while for p-channel transistors it increases. The shift magnitude correlates to gate oxide thickness and decreases with process node. In older technologies, n-MOSFET threshold shift can cause functional failure when n-channel transistors stop closing and p-channel ones stop opening. This effect is less important in submicron technologies, but it can still give a lot of headaches to analogue designers.

   阈值电压漂移。 对于n沟道晶体管，阈值通常会降低(但相关性可能是非单调的，尤其是在高剂量时)，而对于p沟道晶体管，阈值会增加。 偏移量与栅极氧化物的厚度相关，并且随Craft.io节点而减小。 在较旧的技术中，当n沟道晶体管停止关闭而p沟道晶体管停止打开时，n-MOSFET阈值偏移会导致功能故障。 在亚微米技术中，这种影响并不那么重要，但是它仍然会使模拟设计人员感到头疼。

2. Leakage currents flow through parasitic channels opened by an excessive charge in isolating oxides, either from source to drain of the same device, or from one transistor to another. In the first case, a parasitic transistor controlled by the total dose is formed in parallel to the main one. The severity of this effect is highly technology-dependent as the exact shape of isolated oxide matters. Therefore, there is no direct correlation to process nodes, and there is no good way to guess which commercial device will have better or worse TID hardness.

   漏电流流过由隔离氧化物中的过量电荷打开的寄生通道，这些寄生通道从同一器件的源极到漏极，或者从一个晶体管流向另一个晶体管。 在第一种情况下，由总剂量控制的寄生晶体管与主晶体管并联形成。 这种影响的严重程度在很大程度上取决于技术，因为隔离氧化物的确切形状至关重要。 因此，与Craft.io节点没有直接关系，也没有很好的方法来猜测哪个商业设备的TID硬度会更好或更差。

3. Charge carrier mobility decreases due to scattering on accumulated defects. The influence of this factor on submicron digital circuits on silicon is small, but it is a way more important for power transistors (including GaN HEMT).

   电荷载流子迁移率由于累积缺陷上的散射而降低。 这个因素对硅上的亚微米数字电路的影响很小，但是对于功率晶体管(包括GaN HEMT)而言，这是一种更为重要的方法。

4. 1/f noise increase caused by parasitic edge transistors. It is important for analogue and radio frequency circuits and becomes more important at lower process nodes when the influence of other TID effects gradually decreases.

   由寄生边缘晶体管引起的1 / f噪声增加。 这对于模拟和射频电路很重要，并且在其他TID效应的影响逐渐减小时，在较低的过程节点处变得尤为重要。

A quick word on bipolars: the main TID effect there is gain decrease due to leakage-related base current increase. Another bipolar-specific effect is their (non-mandatory) rough reaction to the dose collection at low speed, so-called ELDRS (Enhanced Low Dose Rate Sensitivity). This effect complicates the testing and makes it more expensive. And the worst part is that many CMOS circuits contain a few bipolars (namely in voltage reference circuits) — and therefore can also be susceptible.

一个关于双极的简短说明：由于泄漏相关的基极电流增加，主要的TID效应会导致增益降低。 另一个双极特异性效应是它们在低速下对剂量收集的(非强制性)粗略React，即所谓的ELDRS(增强的低剂量率敏感性)。 这种效果使测试复杂化并使其更加昂贵。 最糟糕的是，许多CMOS电路都包含一些双极性(即在参考电压电路中)，因此也容易受到影响。

剂量率效应 (Dose rate effects)

Another effect related to dose rate is when dose accumulation is so fast that such a large number of electron-hole pairs is generated that a huge excessive electric charge is overflowing every node in the chip and is causing a temporary loss of functionality and sometimes a latchup of parasitic thyristor between supply and ground. The non-functioning time is the usual measure of sensitivity to this kind of effect and it's normally seen in military standards like Mil-Std-883.

与剂量率有关的另一个影响是，剂量累积如此之快，以至于产生了如此大量的电子-空穴对，以至于芯片中的每个节点都溢出了巨大的过量电荷，并导致功能暂时性丧失，有时甚至闭锁电源和地之间的寄生晶闸管的数量。 非工作时间是对这种影响的敏感度的通常度量，通常在军事标准(如Mil-Std-883)中看到。

Total dose rate effects are the reason for “silicon on sapphire” (SOS) and “silicon on insulator” (SOI) technology creation and adoption: the best way to reduce the amount of charge inserted into active devices by the flow of ionizing particles is to cut their electrical connection to the enormously big substrate (and to each other). Why are these effects important? An extremely high dose rate for a short time is a typical consequence of a nuclear explosion, and military guys all around the world deeply care about this matter. Luckily for us, SOI proved to be advantageous in many other applications and therefore became widespread in normal life.

总剂量率效应是创建和采用“蓝宝石上的硅”(SOS)和“绝缘体上的硅”(SOI)技