半加法器和全加法器
半加法器 (Half Adder)
The logic circuit which performs the addition of 2 bits is called Half- Adder. It is a kind of combinational circuit. It contains two binary inputs "augend" and "addend" and two binary outputs Sum and Carry.
执行2位加法的逻辑电路称为Half-Adder。 它是一种组合电路。 它包含两个二进制输入“ augend”和“ addend”以及两个二进制输出Sum和Carry 。
The Sum bit (S) and the Carry bit (C) are given according to the rules of Binary Addition which can be summarized in the form of truth table as,
求和位( S )和进位位( C )是根据二进制加法规则给出的,可以用真值表的形式总结为:
A | B | Sum (S) | Carry (C) |
---|---|---|---|
0 | 0 | 0 | 0 |
0 | 1 | 1 | 0 |
1 | 0 | 1 | 0 |
1 | 1 | 0 | 1 |
一个 | 乙 | 总和(S) | 携带(C) |
---|---|---|---|
0 | 0 | 0 | 0 |
0 | 1个 | 1个 | 0 |
1个 |