armv8 cache PoU和PoC区别

名词解释

Point of Unification(PoU)

Point of Coherency(PoC)

PoU

表示一个CPU中的指令Cache，数据cache还有MMU，TLB等看到的是同一份的内存拷贝。

1. PoU for a PE, 保证PE看到的I/D cache和MMU是同一份拷贝。大多数情况下，PoU是站在单系统的角度来观察的。

2. PoU for inner share, 意思是说在inner share里面的所有PE都能看到相同的一份拷贝。

以上是PoU的两个用法。

armv8.6手册 D4.4.7对PoU功能的描述:

Point of Unification (PoU)

    The PoU for a PE is the point by which the instruction and data caches and the translation table walks of that PE are guaranteed to see the same copy of a memory location. In many cases, the Point of Unification is the point in a uniprocessor memory system by which the instruction and data caches and the translation table walks have merged. 

    The PoU for an Inner Shareable shareability domain is the point by which the instruction and data caches and the translation table walks of all the PEs in that Inner Shareable shareability domain are guaranteed to see the same copy of a memory location.

PoU的用法例子：

(PoU for inner对于self-modify code有一个好处，可以简化data cache和指令cache一致性的步骤，只需要简单两步，不需要memory barrier指令了) Defining this point permits self-modifying software to ensure future instruction fetches are associated with the modified version of the software by using the standard correctness policy of:

1. Clean data cache entry by address.

2. Invalidate instruction cache entry by address

PoC

系统中所有的观察者,例如DSP，GPU，CPU，DMA等都能看到同一份内存拷贝

Point of Coherency (PoC)

The point at which all agents that can access memory are guaranteed to see the same copy of a memory location for accesses of any memory type or cacheability attribute. In many cases this is effectively the main system memory, although the architecture does not prohibit the implementation of caches beyond the PoC that have no effect on the coherency between memory system agents.

 上图为单一的core，可以理解为GPU，CPU,DMA,有能力去访问内存的设备，I/D cacheTLB可以看成是PoU的，在单一的core里面都是同步一份拷贝。

 

上图为两个core，core0和core1想要看到同一份拷贝则必须进行cache一致性操作，这一个观察角度称为PoC。

PoU和PoC的区别

PoC是系统的一个概念，和系统配置相关，包含GPU,CPU,DMA等有能力访问内存的设备，我们称为观察者。

例如，Cortex-A53可以配置L2 cache和没有L2 cache，可能会影响PoU的范围。

 

图1:

    此图中没有集成L2 cache，只有一个Core和I/D cache TLB，所以PoU等于PoC

图2：

1. 站在core1上看集成了L2 cache，包含core，I/D cache TLB L2 cache组成了PoU for inter share

2. 站在系统上看，包含了core1、core2和系统内存，整体组成了PoC

图3：

1. 系统架构包含了两个cluster组成，每个cluster包含了L1、L2 cache，可以独立看成一个PoU。

2. 两个Cluster共享了L3 cache和系统内存，则可以是PoC