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Chapter 3 The device
1) The Diode
a. built-in potential forward bias reverse bias
b. thermal generation of hole and electron pairs in the depletion region reverse currents are substantially larger than the saturation current I s I_s Is
c. Dynamic Behavior Depletion-Region Capacitance C j C_j Cj
C j = C j 0 1 − V D / ϕ 0 C_j = \frac {C_{j0}} {\sqrt{ 1-V_D/\phi_0}} Cj=1−VD/ϕ0Cj0 V D < 0 V_D<0 VD<0 , ∣ V D ∣ |V_D| ∣VD∣ increases, C j C_j Cj decreases
d. Secondary Effects breakdown voltage avalanche breakdown not destructive
Zener breakdown
{ I d = I s ( e V D / ϕ T − 1 ) ϕ T = K T q \begin{cases} I_d = I_s(e^{V_D/\phi_T}-1) \\ \phi_T = \frac {KT}{q}\end{cases} { Id=Is(eVD/ϕT−1)ϕT=qKT operating temperature ϕ T \phi_T ϕT increases with T T T, I d I_d Id decreases at the same time. I s I_s Is increases with T T T
Increasing the temperature causes the leakage current to increase.
2) The MOSFET Transistor
a. four terminal device gate source drain body NMOS PMOS
strong inversion threshold voltage V T V_T VT
{ V T = V T 0 + γ ( ∣ − 2 ϕ F + V S B ∣ − ∣ − 2 ϕ F ∣ ) ϕ F = − ϕ T I n ( N A n i ) \begin{cases}V_T = V_{T0}+\gamma(\sqrt{|-2\phi_F+V_{SB}|}-\sqrt{|-2\phi_F|}) \\ \phi_F = -\phi_TIn(\frac{N_A}{n_i})\end{cases} { VT=