Makefile and Example

1. 这个Makefile能把目录下的所有.c文件编译成.o文件

--------------------------------------------------------------------------------------------------------

CC=gcc
CFLAGS:=-Wall -O2

SOURCE=$(wildcard *.c)
OBJS=$(SOURCE:.c=.o)

All:$(OBJS)

#####################################################
#This way also can works, try it pls
#%.o:%.c
# $(CC) $(CFLAGS) -c $<

.o:.c
 cc $(CFLAGS) -c $<


clean:
 rm *.o

--------------------------------------------------------------------------------------------------------

 

--------------------------------------------------------------------------------------------------------

-----------------------------------------Begin Makefile 1--------------------------------------------------------
#This Makefile can print all the .c and .o file name in the directory
CC=gcc
CFLAGS = -Wall -O2

SOURCE = $(wildcard *.c)
OBJS=$(SOURCE:.c=.o)

OBJS: $(SOURCE)
        echo $(SOURCE)
        echo $(OBJS)
-----------------------------------------End Makefile 1--------------------------------------------------------

-----------------------------------------Begin Makefile 2--------------------------------------------------------
CC=g++
FLAGS= -O3 -Wall

SOURCE = $(wildcard *.c)

OBJS=$(SOURCE:.c=.o)     # [OBJS = $(patsubst %.c, %.o, $(SOURCE))]


all :$(OBJS)
 echo $(OBJS)
 $(CC) $(OBJS) -lcppunit -o main.exe

.o:.cpp
 $(CC) $(FLAGS) -c -o $@ $<

unitTestCase.o: unitTestCase.cpp unitTestCase.h
 $(CC) $(FLAGS) -c $< -o $@
clean:
 rm -rf *.o core *~
 rm -rf *.exe
-----------------------------------------End Makefile 2--------------------------------------------------------

-----------------------------------------Begin Makefile 3--------------------------------------------------------
printenv: printenv.c
        $(CC) $(CFLAGS) $@.c $(LDFLAGS) -o $@

-----------------------------------------End Makefile 3--------------------------------------------------------

 

 

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