uvmgen的使用及其产生的UVM环境介绍


前言

UVM是IC验证的一种方法学,利用UVM搭建的验证环境基本框架都类似,因此,可以通过脚本来生成UVM的验证环境基本框架。本文主要介绍synopsys公司,在vcs工具中自带的一个脚本uvmgen,通过这个脚本,可以自动产生一整套UVM的验证环境,或者也可以只生成其中的一个UVM组件。


一、uvmgen的使用

首先利用uvmgen这个脚本,产生一个完整的UVM环境;然后运行这个环境,解决一些系统、工具、UVM环境之间的一些兼容性问题。

1.1 uvmgen产生一个完整UVM环境

这里展示一下,如何通过uvmgen这个脚本,产生一个完整的UVM环境。

hefei@ubuntu:~$ which uvmgen
/opt/synopsys/vcs_vO-2018.09-SP2/bin/uvmgen
hefei@ubuntu:~$ uvmgen

------------------------------------------------------------
	     WELCOME TO UVM TEMPLATE GENERATOR
------------------------------------------------------------
UVM templates compatible to UVM 1.1/1.2 used.

Using template from /opt/synopsys/vcs_vO-2018.09-SP2/etc/uvm_template/shared/lib/templates/uvm

	 1) Enter 1 to Create Complete Environment
	 2) Enter 2 to Generate Individual Template
Select [1-2]: 1

Do you want to create your own methods [Instead of UVM shorthand macros] ?
Select [ y/Y/n/N ][Default: n]: n

Would you be associating UVM REG models in your environment class? enter (y/n)  [Default: n]:y

Enter Name of RAL Adapter:ral_ad1

Enter the environment name: top_env

Do you want to create Agents?
Select(y/Y/n/N) [Default: n]:y

Enter Master agent data
Enter name of master agent: mst

Enter name of sequencer: sqr1

Enter name of driver: drv1

Enter name of monitor: mon1

Enter name of interface: intf1

Enter name of the transaction: tr1

Is this transaction class extended from a BU class? enter (y/n): n

Enter Slave agent data
Enter name of slave agent: slv

Enter name of sequencer: sqr2

Enter name of driver: drv2

Enter name of monitor: mon2

Enter name of interface: intf2

Do you want to use same transaction class for master and slave agents ? enter (y/n):y

Choose one of the following ral bfm:
1) RAL sequence adapter, single domain
2) RAL sequence adapter, multiplexed domains
select [1-2]:2

Enter Name of second RAL Adapter:ral_ad2

Enter Driver information for the slave agent slv ::
Choose one of following driver available 
1) Driver, PUSH DRIVER (uvm_push_driver) 
2) Driver, PULL DRIVER (uvm_driver)
Select [1- 2] [Default: 2]: 

Enter Driver information for the master agent mst ::
Choose one of following driver available 
1) Driver, PUSH DRIVER (uvm_push_driver) 
2) Driver, PULL DRIVER (uvm_driver)
Select [1- 2] [Default: 2]: 

Would you like to implement scoreboard?
Select(y/Y/n/N) [Default: y]:y

Enter Name of Scoreboard Class:scb

The testcase generated is top_env_test
------------------------------------------------------------
            Template generation completed.                  
------------------------------------------------------------
Usage notes :                                               
1) Find the generated files in "proj/top_env" directory.
                                                            
2) Makefile has been placed in run "proj/top_env/run" directory.  
                                                            
3) Edit files and look for comments marked "ToDo:" and fill 
   in the application-specific behavior for your function.  
                                                            
------------------------------------------------------------

执行完成上面的脚本后,在执行的目录下,会产生一个proj的文件夹,该文件夹的层次结构如下所示:

hefei@ubuntu:~/proj$ tree
.
├── README
├── top_env
│   ├── doc
│   ├── env
│   │   ├── mst.sv
│   │   ├── slv.sv
│   │   ├── top_env_ral_env.sv
│   │   └── top_env.ralf
│   ├── examples
│   ├── hdl
│   │   └── top_env_top.sv
│   ├── include
│   │   ├── mstr_slv_intfs.incl
│   │   ├── mstr_slv_src.incl
│   │   └── top_env.sv
│   ├── run
│   │   └── Makefile
│   ├── src
│   │   ├── mon_2cov.sv
│   │   ├── mst_drv1.sv
│   │   ├── mst_intf1.sv
│   │   ├── mst_mon1.sv
│   │   ├── mst_sequence_library.sv
│   │   ├── mst_sqr1.sv
│   │   ├── mst_tr1.sv
│   │   ├── ral_multiplexed.sv
│   │   ├── scb.sv
│   │   ├── slv_drv2.sv
│   │   ├── slv_intf2.sv
│   │   ├── slv_mon2.sv
│   │   ├── slv_sqr2.sv
│   │   ├── slv_tr1.sv
│   │   ├── top_env_cfg.sv
│   │   └── top_env_cov.sv
│   └── tests
│       ├── top_env_tb_mod.sv
│       └── top_env_test.sv
└── uvmgen_options_log.txt

1.2 解决运行报错的问题

直接进入到proj/top_env/run这个文件夹,执行make后,会报如下错误,这是因为我们的系统是64位的,而执行ralgen和vcs的时候都没有加上-full64这个选项。

hefei@ubuntu:~/proj/top_env/run$ make
rm -rf simv* csrc
rm -rf vc_hdrs.h .vcsmx_rebuild *.log
rm -rf work/* *.svshell vcs_version
cd ../env; ralgen -uvm -l sv -t top_env -c b -c a -c f top_env.ralf;cd -
Error: Bad VMM installation. Executable 'ralgen.binary' not visible.
/home/hefei/proj/top_env/run
vcs -sverilog -l vcs.log -debug_pp +incdir+/opt/uvm-1.2/src /opt/uvm-1.2/src/uvm_pkg.sv /opt/uvm-1.2/src/dpi/uvm_dpi.cc -CFLAGS -DVCS  +incdir+../include+../src+../env+../tests+../hdl   \
        	 ../tests/top_env_tb_mod.sv ../hdl/top_env_top.sv 

Error-[VCS_COM_UNE] Cannot find VCS compiler
  VCS compiler not found. Environment variable VCS_HOME 
  (/opt/synopsys/vcs_vO-2018.09-SP2/linux) is selecting a directory in which 
  there isn't a compiler '/opt/synopsys/vcs_vO-2018.09-SP2/linux/bin/vcs1' for
  a machine of this type 'linux'.
  Please check whether 'VCS_HOME' is incorrect; if not, see below.

 Perhaps vcs hasn't been installed for machine of type "linux".
 Or the installation has been damaged.
 To verify whether vcsO-2018.09 supports machine of type "Linux 5.4.0-77-generic",
 please look at ReleaseNotes for more details .
 We determine the machine type from uname; maybe uname is incorrect.
 You can fix installation problems by reinstalling from CDROM 
 or downloading it from the Synopsys ftp server. 
 For assistance, please contact vcs technical support
 at vcs_support@synopsys.com or call 1-800-VERILOG 
Makefile:61: recipe for target 'comp' failed
make: *** [comp] Error 1

打开Makefile文件,在41行COMP_OPTS,以及61行ralgen后面,分别加入-full64选项,如下代码所示。

COMP_OPTS = -full64 -sverilog -l vcs.log $(UVM) $(INCL) $(DEFINES)

	cd ../env; ralgen -full64 -uvm -l sv -t top_env -c b -c a -c f top_env.ralf;cd -

重新make后,遇到的libvcsnew.so: undefined reference to问题,可以参考如下链接进行解决。
libvcsnew.so: undefined reference to
加入-LDFLAGS -Wl,–no-as-needed选项后,代码如下:

COMP_OPTS = -full64 -sverilog -LDFLAGS -Wl,--no-as-needed -l vcs.log $(UVM) $(INCL) $(DEFINES) 

再重新make后,得到的仿真log如下所示

./simv  -l simv.log \
        +ntb_random_seed=1  +UVM_TESTNAME=top_env_test
Chronologic VCS simulator copyright 1991-2018
Contains Synopsys proprietary information.
Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64;  Jun 24 19:47 2021
UVM_INFO /opt/uvm-1.2/src/base/uvm_root.svh(392) @ 0: reporter [UVM/RELNOTES] 
----------------------------------------------------------------
UVM-1.2
(C) 2007-2014 Mentor Graphics Corporation
(C) 2007-2014 Cadence Design Systems, Inc.
(C) 2006-2014 Synopsys, Inc.
(C) 2011-2013 Cypress Semiconductor Corp.
(C) 2013-2014 NVIDIA Corporation
----------------------------------------------------------------

  ***********       IMPORTANT RELEASE NOTES         ************

  You are using a version of the UVM library that has been compiled
  with `UVM_NO_DEPRECATED undefined.
  See http://www.eda.org/svdb/view.php?id=3313 for more details.

  You are using a version of the UVM library that has been compiled
  with `UVM_OBJECT_DO_NOT_NEED_CONSTRUCTOR undefined.
  See http://www.eda.org/svdb/view.php?id=3770 for more details.

      (Specify +UVM_NO_RELNOTES to turn off this notice)

UVM_INFO @ 0: reporter [RNTST] Running test top_env_test...
UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence

Note-[FCICIO] Instance coverage is ON
/home/hefei/proj/top_env/run/../env/ral_top_env.sv, 161
top_env_tb_mod, "top_env_tb_mod::ral_block_top_env::cg_addr"
  Instance coverage is set (option.per_instance = 1) for covergroup 
  'top_env_tb_mod::ral_block_top_env::cg_addr'
  
  Covergroup Instance: me.obj.cg_addr 
  Design hierarchy: top_env_top.test

UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence

Note-[FCICIO] Instance coverage is ON
/home/hefei/proj/top_env/run/../env/ral_top_env.sv, 14
top_env_tb_mod, "top_env_tb_mod::ral_reg_top_env_CHIP_ID::cg_bits"
  Instance coverage is set (option.per_instance = 1) for covergroup 
  'top_env_tb_mod::ral_reg_top_env_CHIP_ID::cg_bits'
  
  Covergroup Instance: me.obj.cg_bits 
  Design hierarchy: top_env_top.test

UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence
UVM_INFO /opt/uvm-1.2/src/base/uvm_root.svh(579) @ 0: reporter [UVMTOP] UVM testbench topology:
--------------------------------------------------------------------------
Name                       Type                                Size  Value
--------------------------------------------------------------------------
uvm_test_top               top_env_test                        -     @423 
  env                      top_env_ral_env                     -     @436 
    cov                    top_env_cov                         -     @467 
      Coverage Analysis    uvm_analysis_imp                    -     @476 
    master_agent           mst                                 -     @449 
      mast_drv             drv1                                -     @688 
        rsp_port           uvm_analysis_port                   -     @707 
        seq_item_port      uvm_seq_item_pull_port              -     @697 
      mast_mon             mon1                                -     @532 
        mon_analysis_port  uvm_analysis_port                   -     @541 
      mast_sqr             sqr1                                -     @551 
        rsp_export         uvm_analysis_export                 -     @560 
        seq_item_export    uvm_seq_item_pull_imp               -     @678 
        arbitration_queue  array                               0     -    
        lock_queue         array                               0     -    
        num_last_reqs      integral                            32    'd1  
        num_last_rsps      integral                            32    'd1  
    mon2cov                mon1_2cov_connect                   -     @486 
    sb                     scb                                 -     @495 
      after_export         uvm_analysis_export                 -     @736 
      before_export        uvm_analysis_export                 -     @726 
      comparator           uvm_in_order_class_comparator #(T)  -     @746 
        after              uvm_tlm_analysis_fifo #(T)          -     @844 
          analysis_export  uvm_analysis_imp                    -     @893 
          get_ap           uvm_analysis_port                   -     @883 
          get_peek_export  uvm_get_peek_imp                    -     @863 
          put_ap           uvm_analysis_port                   -     @873 
          put_export       uvm_put_imp                         -     @853 
        after_export       uvm_analysis_export                 -     @765 
        before             uvm_tlm_analysis_fifo #(T)          -     @785 
          analysis_export  uvm_analysis_imp                    -     @834 
          get_ap           uvm_analysis_port                   -     @824 
          get_peek_export  uvm_get_peek_imp                    -     @804 
          put_ap           uvm_analysis_port                   -     @814 
          put_export       uvm_put_imp                         -     @794 
        before_export      uvm_analysis_export                 -     @755 
        pair_ap            uvm_analysis_port                   -     @775 
    slave_agent            slv                                 -     @458 
      drv                  drv2                                -     @923 
        rsp_port           uvm_analysis_port                   -     @942 
        seq_item_port      uvm_seq_item_pull_port              -     @932 
      mon                  mon2                                -     @904 
        mon_analysis_port  uvm_analysis_port                   -     @913 
      slv_seqr             sqr2                                -     @952 
        rsp_export         uvm_analysis_export                 -     @961 
        seq_item_export    uvm_seq_item_pull_imp               -     @1079
        arbitration_queue  array                               0     -    
        lock_queue         array                               0     -    
        num_last_reqs      integral                            32    'd1  
        num_last_rsps      integral                            32    'd1  
--------------------------------------------------------------------------

UVM_INFO /opt/uvm-1.2/src/base/uvm_factory.svh(1645) @ 0: reporter [UVM/FACTORY/PRINT] 
#### Factory Configuration (*)

  No instance or type overrides are registered with this factory

All types registered with the factory: 80 total
  Type Name
  ---------
  REGTR
  base_sequence
  drv1
  drv2
  mon1
  mon1_2cov_connect
  mon2
  mst
  ral_ad2
  ral_block_top_env
  ral_mem_top_env_top_env_RAM
  ral_reg_top_env_CHIP_ID
  reg_seq
  scb
  sequence_0
  sequence_1
  slv
  sqr1
  sqr1_sequence_library
  sqr2
  top_env_cfg
  top_env_cov
  top_env_ral_env
  top_env_test
  tr1
(*) Types with no associated type name will be printed as <unknown>

####


UVM_INFO ../src/mst_drv1.sv(121) @ 0: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_mon1.sv(133) @ 0: uvm_test_top.env.master_agent.mast_mon [top_env_MONITOR] Starting transaction...
UVM_INFO ../src/mst_mon1.sv(137) @ 0: uvm_test_top.env.master_agent.mast_mon [top_env_MONITOR]  User need to add monitoring logic 
$finish called from file "../src/mst_mon1.sv", line 138.
$finish at simulation time                    0
           V C S   S i m u l a t i o n   R e p o r t 
Time: 0
CPU Time:      1.110 seconds;       Data structure size:   0.4Mb

到此为止,通过uvmgen脚本生成的整个UVM环境已经能够正常运行。

uvmgen还可以生成单个的UVM组件,以及快速产生一个完整的UVM环境的方法,更多关于uvmgen脚本的使用方法,可以参考如下文档。

uvmgen_userguide.pdf

二、uvmgen产生的UVM环境

拿到这个环境,首先,了解一下这个环境的框架,其次想着打印一下接口的波形,看看时钟复位是否正确;最后,要解决仿真异常结束的问题,上面仿真执行的log显示,$finish called from file “…/src/mst_mon1.sv”, line 138.,这不是UVM仿真的正常结束的log。

2.1 环境框架

uvmgen产生的uvm环境的框架如下图所示:
在这里插入图片描述

2.2 添加打印波形

打开顶层文件proj/top_env/hdl/top_env_top.sv,加入如下代码实现打印波形。

initial
    $fsdbDumpvars();

重新make后,遇到的Undefined System Task call to '$fsdbDumpfile '问题,解决方法参考如下:
Undefined System Task call to ‘$fsdbDumpfile’

之后打开fsdb波形,调出时钟和复位信号后,显示正常,并没有像下文所述存在bug的情况,虽然VCS版本不同,但对比了时钟复位产生的源代码都是一致的。
2011版VCS自带的工具UVMGEN的一个BUG,很难想像有这种级别的BUG~~

2.3 解决仿真异常结束的问题

仿真执行的log显示,$finish called from file “…/src/mst_mon1.sv”, line 138.,这不是UVM仿真的正常结束的log,对应的sequence激励也没有下发。
打开proj/top_env/src/mst_mon1.sv,定位到138行,将138行的finish屏蔽,在130行加入一个wait(0),避免mon1中的forever循环一直刷log(这里只是临时处理一下,后期填入代码的时候需要将其去掉),如下图所示。
在这里插入图片描述
同样的方式处理proj/top_env/src/slv_mon2.sv文件。

再重新make,通过下面的log,可以看到仿真已经正常结束,sequence中的激励,也已经下发到了drver中。

./simv  -l simv.log \
        +ntb_random_seed=1  +UVM_TESTNAME=top_env_test
Chronologic VCS simulator copyright 1991-2018
Contains Synopsys proprietary information.
Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64;  Jun 25 00:02 2021
UVM_INFO /opt/uvm-1.2/src/base/uvm_root.svh(392) @ 0: reporter [UVM/RELNOTES] 
----------------------------------------------------------------
UVM-1.2
(C) 2007-2014 Mentor Graphics Corporation
(C) 2007-2014 Cadence Design Systems, Inc.
(C) 2006-2014 Synopsys, Inc.
(C) 2011-2013 Cypress Semiconductor Corp.
(C) 2013-2014 NVIDIA Corporation
----------------------------------------------------------------

  ***********       IMPORTANT RELEASE NOTES         ************

  You are using a version of the UVM library that has been compiled
  with `UVM_NO_DEPRECATED undefined.
  See http://www.eda.org/svdb/view.php?id=3313 for more details.

  You are using a version of the UVM library that has been compiled
  with `UVM_OBJECT_DO_NOT_NEED_CONSTRUCTOR undefined.
  See http://www.eda.org/svdb/view.php?id=3770 for more details.

      (Specify +UVM_NO_RELNOTES to turn off this notice)

UVM_INFO @ 0: reporter [RNTST] Running test top_env_test...
*Verdi* Loading libsscore_vcs201809.so
FSDB Dumper for VCS, Release Verdi_O-2018.09-SP2, Linux x86_64/64bit, 02/21/2019
(C) 1996 - 2019 by Synopsys, Inc.
*Verdi* FSDB WARNING: The FSDB file already exists. Overwriting the FSDB file may crash the programs that are using this file.
*Verdi* : Create FSDB file 'novas.fsdb'
*Verdi* : Begin traversing the scopes, layer (0).
*Verdi* : End of traversing.
UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence

Note-[FCICIO] Instance coverage is ON
/home/hefei/proj/top_env/run/../env/ral_top_env.sv, 161
top_env_tb_mod, "top_env_tb_mod::ral_block_top_env::cg_addr"
  Instance coverage is set (option.per_instance = 1) for covergroup 
  'top_env_tb_mod::ral_block_top_env::cg_addr'
  
  Covergroup Instance: me.obj.cg_addr 
  Design hierarchy: top_env_top.test

UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence

Note-[FCICIO] Instance coverage is ON
/home/hefei/proj/top_env/run/../env/ral_top_env.sv, 14
top_env_tb_mod, "top_env_tb_mod::ral_reg_top_env_CHIP_ID::cg_bits"
  Instance coverage is set (option.per_instance = 1) for covergroup 
  'top_env_tb_mod::ral_reg_top_env_CHIP_ID::cg_bits'
  
  Covergroup Instance: me.obj.cg_bits 
  Design hierarchy: top_env_top.test

UVM_INFO /opt/uvm-1.2/src/base/uvm_spell_chkr.svh(123) @ 0: reporter [UVM/CONFIGDB/SPELLCHK] include_coverage not located, did you mean default_sequence
UVM_INFO /opt/uvm-1.2/src/base/uvm_root.svh(579) @ 0: reporter [UVMTOP] UVM testbench topology:
--------------------------------------------------------------------------
Name                       Type                                Size  Value
--------------------------------------------------------------------------
uvm_test_top               top_env_test                        -     @423 
  env                      top_env_ral_env                     -     @436 
    cov                    top_env_cov                         -     @467 
      Coverage Analysis    uvm_analysis_imp                    -     @476 
    master_agent           mst                                 -     @449 
      mast_drv             drv1                                -     @688 
        rsp_port           uvm_analysis_port                   -     @707 
        seq_item_port      uvm_seq_item_pull_port              -     @697 
      mast_mon             mon1                                -     @532 
        mon_analysis_port  uvm_analysis_port                   -     @541 
      mast_sqr             sqr1                                -     @551 
        rsp_export         uvm_analysis_export                 -     @560 
        seq_item_export    uvm_seq_item_pull_imp               -     @678 
        arbitration_queue  array                               0     -    
        lock_queue         array                               0     -    
        num_last_reqs      integral                            32    'd1  
        num_last_rsps      integral                            32    'd1  
    mon2cov                mon1_2cov_connect                   -     @486 
    sb                     scb                                 -     @495 
      after_export         uvm_analysis_export                 -     @736 
      before_export        uvm_analysis_export                 -     @726 
      comparator           uvm_in_order_class_comparator #(T)  -     @746 
        after              uvm_tlm_analysis_fifo #(T)          -     @844 
          analysis_export  uvm_analysis_imp                    -     @893 
          get_ap           uvm_analysis_port                   -     @883 
          get_peek_export  uvm_get_peek_imp                    -     @863 
          put_ap           uvm_analysis_port                   -     @873 
          put_export       uvm_put_imp                         -     @853 
        after_export       uvm_analysis_export                 -     @765 
        before             uvm_tlm_analysis_fifo #(T)          -     @785 
          analysis_export  uvm_analysis_imp                    -     @834 
          get_ap           uvm_analysis_port                   -     @824 
          get_peek_export  uvm_get_peek_imp                    -     @804 
          put_ap           uvm_analysis_port                   -     @814 
          put_export       uvm_put_imp                         -     @794 
        before_export      uvm_analysis_export                 -     @755 
        pair_ap            uvm_analysis_port                   -     @775 
    slave_agent            slv                                 -     @458 
      drv                  drv2                                -     @923 
        rsp_port           uvm_analysis_port                   -     @942 
        seq_item_port      uvm_seq_item_pull_port              -     @932 
      mon                  mon2                                -     @904 
        mon_analysis_port  uvm_analysis_port                   -     @913 
      slv_seqr             sqr2                                -     @952 
        rsp_export         uvm_analysis_export                 -     @961 
        seq_item_export    uvm_seq_item_pull_imp               -     @1079
        arbitration_queue  array                               0     -    
        lock_queue         array                               0     -    
        num_last_reqs      integral                            32    'd1  
        num_last_rsps      integral                            32    'd1  
--------------------------------------------------------------------------

UVM_INFO /opt/uvm-1.2/src/base/uvm_factory.svh(1645) @ 0: reporter [UVM/FACTORY/PRINT] 
#### Factory Configuration (*)

  No instance or type overrides are registered with this factory

All types registered with the factory: 80 total
  Type Name
  ---------
  REGTR
  base_sequence
  drv1
  drv2
  mon1
  mon1_2cov_connect
  mon2
  mst
  ral_ad2
  ral_block_top_env
  ral_mem_top_env_top_env_RAM
  ral_reg_top_env_CHIP_ID
  reg_seq
  scb
  sequence_0
  sequence_1
  slv
  sqr1
  sqr1_sequence_library
  sqr2
  top_env_cfg
  top_env_cov
  top_env_ral_env
  top_env_test
  tr1
(*) Types with no associated type name will be printed as <unknown>

####


UVM_INFO ../src/mst_drv1.sv(121) @ 0: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/slv_drv2.sv(121) @ 0: uvm_test_top.env.slave_agent.drv [top_env_DRIVER] Starting transaction...
UVM_INFO /opt/uvm-1.2/src/seq/uvm_sequence_library.svh(659) @ 0: uvm_test_top.env.master_agent.mast_sqr@@sqr1_sequence_library [SEQLIB/START] Starting sequence library sqr1_sequence_library in main phase: 10 iterations in mode UVM_SEQ_LIB_RAND
UVM_INFO ../src/mst_drv1.sv(137) @ 0: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 0: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 1000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 1000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 1100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 1100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 1200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 1200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 1300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 1300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 1400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 1400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 1500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 1500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 1600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 1600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 1700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 1700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 1800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 1800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 1900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 1900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2100: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2200: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2300: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2400: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2500: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2600: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2700: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2800: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 2900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 2900: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO ../src/mst_drv1.sv(137) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Completed transaction...
UVM_INFO ../src/mst_drv1.sv(121) @ 3000: uvm_test_top.env.master_agent.mast_drv [top_env_DRIVER] Starting transaction...
UVM_INFO /opt/uvm-1.2/src/seq/uvm_sequence_library.svh(736) @ 3000: uvm_test_top.env.master_agent.mast_sqr@@sqr1_sequence_library [SEQLIB/END] Ending sequence library in phase main
UVM_INFO ../src/scb.sv(50) @ 3000: uvm_test_top.env.sb [SBRPT] Matches = 0, Mismatches = 0
UVM_INFO /opt/uvm-1.2/src/base/uvm_report_server.svh(847) @ 3000: reporter [UVM/REPORT/SERVER] 
--- UVM Report Summary ---

** Report counts by severity
UVM_INFO :  212
UVM_WARNING :    0
UVM_ERROR :    0
UVM_FATAL :    0
** Report counts by id
[RNTST]     1
[SBRPT]     1
[SEQLIB/END]     1
[SEQLIB/START]     1
[UVM/CONFIGDB/SPELLCHK]     3
[UVM/FACTORY/PRINT]     1
[UVM/RELNOTES]     1
[UVMTOP]     1
[top_env_DRIVER]   202

$finish called from file "/opt/uvm-1.2/src/base/uvm_root.svh", line 517.
$finish at simulation time                 3000
           V C S   S i m u l a t i o n   R e p o r t 
Time: 3000
CPU Time:      1.350 seconds;       Data structure size:   0.5Mb

到此为止,通过uvmgen脚本产生的UVM环境框架,已经正常编译仿真,下面需要做的就是,根据我们自己的项目,往对应的组件里边填入具体的实现,需要修改的组件包括driver、monitor、sequence、regmodel、coverage等。

2.3 发现环境中存在的一些问题

问题一:monitor组件获取不到interface。

不管是mst还是slv中的monitor组件,一方面是get的时候用的标签,和前面set的不一致,导致get不到interface;另一方面,没有去判断get到的句柄是否为空。

修改mst_mon1的代码如下所示:
在这里插入图片描述
主要修改的地方有两点:1、85行get函数的第三个参数标签由mon_if改为mst_if;2、添加91和92行,用于检测mst_mon1中是否get到interface,如果get不到,立马结束仿真。

slv_mon2的代码修改方式和mst_mon1类似,标签改成slv_if。
在这里插入图片描述
至于与这些get任务相对应的set任务在哪里,可以参考如下帖子:
如何定位uvm_config_db get任务的来源
总的来说,agt、drv、mon中的get任务都来自proj/top_env/tests/top_env_tb_mod.sv中,19和20行的两个set任务,当set任务前面两个参数为空的情况下,应该是全域去set,因此可以在uvm所有地方都能get到这个interface。

最后,需要将proj/top_env/env/mst.sv和proj/top_env/env/slv.sv的38和39行注释掉,如下图所示,这是因为,这个set函数将自己的interface传递给自己没有任何意义,而且在仿真的时候,通过 +UVM_CONFIG_DB_TRACE加入这个宏之后,还会debug报错。
在这里插入图片描述


总结

本文首先记录了利用uvmgen这个脚本,去产生一个完整的UVM验证环境框架的方法;然后解决了一些系统、工具、UVM环境之间的兼容性问题;最后发现并解决了,脚本生成的UVM验证环境框架中,在通过config_db传递interface时候的问题。

  • 21
    点赞
  • 147
    收藏
    觉得还不错? 一键收藏
  • 10
    评论
UVMGen是一个用于自动生成UVM(Universal Verification Methodology)测试环境的工具。它可以帮助我们避免手动编写大量的UVM代码,提高测试环境开发的效率。 使用UVMGen可以按照以下步骤进行: 1. 安装和配置UVMGen工具:首先,我们需要从官方网站下载UVMGen工具,并按照它的安装指南进行安装。然后,我们需要配置UVMGen的设置,将其集成到我们使用的编辑器或IDE中。 2. 定义和设计测试环境:在使用UVMGen之前,我们需要先定义和设计要测试的设备或电路的测试环境。这包括编写设备模型、寄存器模型、序列以及其他所需的UVM组件。 3. 使用UVMGen进行测试环境生成:通过在编辑器或IDE中调用UVMGen命令或使用其图形界面,我们可以指定要生成的UVM组件和配置选项。根据我们的设定,UVMGen会自动生成相应的UVM代码。 4. 自定义和修改生成的代码:一旦使用UVMGen生成了UVM代码,我们可以根据需要进一步自定义和修改它们。这包括添加定制的功能、连接设备、调整参数等。 5. 验证和测试:在完成代码自定义和修改后,我们可以使用生成的UVM测试环境进行验证和测试。通过编写和运行UVM测试用例,我们可以检查设备或电路的功能是否符合要求。 总的来说,使用UVMGen可以减少我们在编写UVM测试环境时的工作量,并提高测试环境开发的效率。它帮助我们自动生成大部分的UVM代码,同时也允许我们根据需要对生成的代码进行自定义和修改。这使得我们可以更专注于验证和测试的任务,而不需要花费过多的精力在底层的UVM代码编写上。
评论 10
添加红包

请填写红包祝福语或标题

红包个数最小为10个

红包金额最低5元

当前余额3.43前往充值 >
需支付:10.00
成就一亿技术人!
领取后你会自动成为博主和红包主的粉丝 规则
hope_wisdom
发出的红包
实付
使用余额支付
点击重新获取
扫码支付
钱包余额 0

抵扣说明:

1.余额是钱包充值的虚拟货币,按照1:1的比例进行支付金额的抵扣。
2.余额无法直接购买下载,可以购买VIP、付费专栏及课程。

余额充值