linux clk

static DEFINE_SPINLOCK(lock);

static void __init fx6_gate_clocks_init(struct device_node *np)

{

        struct clk_onecell_data *clk_data;

        struct property *prop;

        const __be32 *p;

        const char *clk_parent, *clk_name;

        unsigned int i=0,number;

        void __iomem *clk_reg_ctrl,*clk_reg_status;

        u32 clk_bit,index,force_enable=0,force_offset;

        clk_reg_ctrl=of_iomap(np,0);

        clk_reg_status=clk_reg_ctrl+GATE_STATUS_OFFSET;

        clk_data=kmalloc(sizeof(struct clk_onecell_datat), GFP_KERNEL);

        number=of_property_count_u32_elems(np, "clock-indices");

        of_property_read_u32_index(np, "clock-indices",number-1,&number);

        clkdata->clks =  kcalloc(number+1,sizeof(struct clk*),GFP_KERNEL);

        of_property_read_u32(np, "force-idle-enable", &force_enable);

        of_property_for_each_u32(np, "clock-indices",prop,p,index) {

                of_property_read_string_index(np, "clock-output-names",i, &clk_name);

                clk_parent=of_clk_get_parent_name(np,i);

                clk_bit = index % 32;

                clk_data->clks[index] = sc_clk_regiseter_gate(null,clk_name,clk_parent,0,clk_reg_ctrl,clk_bit,clk_reg_status,clk_bit,&lock);

                i++;

}

        clk_data->clk_num = number+1;

        of_clk_add_provider(np,of_clk_src_onecell_get, clk_data);

        return;

}