Question
2. What entries (rows) in the page directory have been filled in at this point? What addresses do they map and where do they point? In other words, fill out this table as much as possible:
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Entry Base Virtual Address Points to (logically): 1023 0xfffc00000 Page table for top 4MB of phys memory 1022 0xfff800000 ? . ? ? . ? ? . ? ? 2 0x00800000 ? 1 0x00400000 ? 0 0x00000000 [see next question]
3. (From Lecture 3) We have placed the kernel and user environment in the same address space. Why will user programs not be able to read or write the kernel's memory? What specific mechanisms protect the kernel memory?
参考mem_init()里的最后一段code,关于控制寄存器cr0~cr3的作用参考i386手册的4.1.3。
在这之前,paging机制没有打开,也就是说虚拟地址va一次转换就成了pa,pa = la = va - KERNBASE, 在这之后,就要通过cr3里存放的pgdir地址来映射查找物理地址。
225 // Switch from the minimal entry page directory to the full kern_pgdir
226 // page table we just created. Our instruction pointer should be
227 // somewhere between KERNBASE and KERNBASE+4MB right now, which is
228 // mapped the same way by both page tables.
229 //
230 // If the machine reboots at this point, you've probably set up your
231 // kern_pgdir wrong.
232 lcr3(PADDR(kern_pgdir));
233
234 check_page_free_list(0);
235
236 // entry.S set the really important flags in cr0 (including enabling
237 // paging). Here we configure the rest of the flags that we care about.
238 cr0 = rcr0();
239 cr0 |= CR0_PE|CR0_PG|CR0_AM|CR0_WP|CR0_NE|CR0_MP;
240 cr0 &= ~(CR0_TS|CR0_EM);
241 lcr0(cr0);
242
4. What is the maximum amount of physical memory that this operating system can support? Why?
参考pgdir所能映射的地址大小。
5. How much space overhead is there for managing memory, if we actually had the maximum amount of physical memory? How is this overhead broken down?
sizeof(pgdir) + sizeof(page table) * 1024, a little bit more than 4MB.
6. Revisit the page table setup in kern/entry.S and kern/entrypgdir.c. Immediately after we turn on paging, EIP is still a low number (a little over 1MB). At what point do we transition to running at an EIP above KERNBASE? What makes it possible for us to continue executing at a low EIP between when we enable paging and when we begin running at an EIP above KERNBASE? Why is this transition necessary?