PCIE 层次结构

           This document specifies the architecture in terms of three discrete logical layers: the Transaction Layer, the Data Link Layer, and the Physical Layer. Each of these layers is divided into two sections:  one that processes outbound (to be transmitted) information and one that processes inbound (received) information, as shown in Figure 1-4. The fundamental goal of this layering definition is to facilitate the reader’s understanding of the specification. Note that this layering does not imply a particular PCI Express implementation.、、

             PCI Express uses packets to communicate information between components. Packets are formed   in the Transaction and Data Link Layers to carry the information from the transmitting component 

to the receiving component. As the transmitted packets flow through the other layers, they are extended with additional information necessary to handle packets at those layers. At the receiving side the reverse process occurs and packets get transformed from their Physical Layer representation to the Data Link Layer representation and finally (for Transaction Layer Packets) to the form that can be processed by the Transaction Layer of the receiving device. Figure 1-5 shows the conceptual
flow of transaction level packet information through the layers.  

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