UVM环境介绍
HEAD commitID: 1f968ef
1. core-v-verif/lib/uvm_agents/uvma_axi5/src/uvma_axi_aw_assert.sv
// Copyright 2022 Thales DIS SAS
//
// Licensed under the Solderpad Hardware Licence, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.0
// You may obtain a copy of the License at https://solderpad.org/licenses/
//
// Original Author: Alae Eddine EZ ZEJJARI (alae-eddine.ez-zejjari@external.thalesgroup.com) – sub-contractor MU-Electronics for Thales group
// Co-Author: Abdelaali Khardazi
// ***************************WRITE ADDRESS CHANNEL ************************** //
module uvma_axi_aw_assert (uvma_axi_intf axi_assert);
import uvm_pkg::*;
// *************************** Check if control information Signals are not equal to X or Z when WVALID is HIGH (Section A3.2.2) ************************** //
property AXI4_AWID_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!$isunknown(axi_assert.psv_axi_cb.aw_id));
endproperty
property AXI4_AWADDR_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!$isunknown(axi_assert.psv_axi_cb.aw_addr));
endproperty
property AXI4_AWLEN_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!$isunknown(axi_assert.psv_axi_cb.aw_len));
endproperty
property AXI4_AWSIZE_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!$isunknown(axi_assert.psv_axi_cb.aw_size));
endproperty
property AXI4_AWBURST_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!$isunknown(axi_assert.psv_axi_cb.aw_burst));
endproperty
property AXI4_AWLOCK_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!$isunknown(axi_assert.psv_axi_cb.aw_lock));
endproperty
property AXI4_AWCACHE_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!$isunknown(axi_assert.psv_axi_cb.aw_cache));
endproperty
property AXI4_AWPROT_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!$isunknown(axi_assert.psv_axi_cb.aw_prot));
endproperty
property AXI4_AWUSER_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!$isunknown(axi_assert.psv_axi_cb.aw_user));
endproperty
property AXI4_AWQOS_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!$isunknown(axi_assert.psv_axi_cb.aw_qos));
endproperty
property AXI4_AWREGION_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!$isunknown(axi_assert.psv_axi_cb.aw_region));
endproperty
// A value of X on AWVALID is not permitted when not in reset (Section A3.1.2)
property AXI4_AWVALID_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) (!$isunknown(axi_assert.psv_axi_cb.aw_valid));
endproperty
// A value of X on AWREADY is not permitted when not in reset (Section A3.1.2)
property AXI4_AWREADY_X;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) (!$isunknown(axi_assert.psv_axi_cb.aw_ready));
endproperty
// *************************** Check if control information Signals are stable when AWVALID is HIGH (Section A3.2.1) ************************** //
property AXI4_AWID_STABLE;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!axi_assert.psv_axi_cb.aw_ready |=> ($stable(axi_assert.psv_axi_cb.aw_id)));
endproperty
property AXI4_AWADDR_STABLE;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!axi_assert.psv_axi_cb.aw_ready |=> ($stable(axi_assert.psv_axi_cb.aw_addr)));
endproperty
property AXI4_AWLEN_STABLE;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!axi_assert.psv_axi_cb.aw_ready |=> ($stable(axi_assert.psv_axi_cb.aw_len)));
endproperty
property AXI4_AWSIZE_STABLE;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!axi_assert.psv_axi_cb.aw_ready |=> ($stable(axi_assert.psv_axi_cb.aw_size)));
endproperty
property AXI4_AWBURST_STABLE;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!axi_assert.psv_axi_cb.aw_ready |=> ($stable(axi_assert.psv_axi_cb.aw_burst)));
endproperty
property AXI4_AWLOCK_STABLE;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!axi_assert.psv_axi_cb.aw_ready |=> ($stable(axi_assert.psv_axi_cb.aw_lock)));
endproperty
property AXI4_AWCACHE_STABLE;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!axi_assert.psv_axi_cb.aw_ready |=> ($stable(axi_assert.psv_axi_cb.aw_cache)));
endproperty
property AXI4_AWPROT_STABLE;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!axi_assert.psv_axi_cb.aw_ready |=> ($stable(axi_assert.psv_axi_cb.aw_prot)));
endproperty
property AXI4_AWUSER_STABLE;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert.psv_axi_cb.aw_valid |-> (!axi_assert.psv_axi_cb.aw_ready |=> ($stable(axi_assert.psv_axi_cb.aw_user)));
endproperty
property AXI4_AWQOS_STABLE;
@(posedge axi_assert.clk && axi_assert.aw_assertion_enabled) disable iff (!axi_assert.rst_n) axi_assert