Controlled Impedance PCBs

 An Introduction to the Design and Manufacture of Controlled Impedance PCBs with Insights into Insertion loss.

Controlled Impedance PCB Design and Manufacture with Insights into Insertion Loss (polarinstruments.com)

Page

3. What is Controlled Impedance? (controlled characteristic impedance)

4. Why do we need controlled impedances?

5. Types of systems that use controlled impedances / Controlled impedances on PCB traces

6. Examples of PCB controlled impedances

8. Manufacturing controlled impedance PCBs

10. Exploded view of a test coupon

11. Typical Test Coupon

12. Calculating the value of impedances using Field Solvers

13. Characterising your manufacturing process

14. Measuring controlled impedances

15. Using airline standards

16. Differential configurations

17. Coplanar configurations

18. A brief insight into insertion loss

19. Typical questions and answers

20. Frequencies over 2GHz and insertion loss

21. Polar tools for stackup design impedance & insertion loss modelling and measurement

Types of systems that use controlled impedance PCBs

Although we have focused on wire interconnections, exactly the same considerations apply to signal transfer through traces on a PCB. When board traces carry signals containing high frequencies care must be taken to design traces that match the impedance of the driver and receiver devices. The longer the trace, or the greater the frequencies involved, then the greater the need to control the trace impedance. The PCB manufacturer controls the impedance by varying the dimensions and spacing of the particular trace or laminate.

Any impedance mismatch can be extremely difficult to analyse once a PCB is loaded with components. Components have a range of tolerances, so that one batch of components may tolerate an impedance mismatch while another batch might not. Moreover, a component’s characteristics may change with temperature, so that the problems may come and go. Thus, if changing a component appears to cure a problem, the components may become the suspects instead of the trace. Component selection becomes the solution, and build costs are driven up, while all the time the real fault – trace impedance mismatch – goes undetected!

For these reasons a PCB designer will specify trace impedance and tolerance and should work with the PCB manufacturer to ensure that the PCB meets the specifications.

Controlled impedances on PCB traces

Over time, more and more PCB designs need to take into account impedance control

* telecommunications

* video signal processing

* high speed digital processing

* real time graphic processing

* process control

Most homes today have numerous applications of these technologies, for example

* Routers, cordless phones, satellite TV, internet TV

* Video games, phones

* Low cost personal computers, laser printers

* Home automation

* Auto engine control modules

* Infotainment modules

* Driver assistance, GPS navigation

Examples of PCB controlled impedances

 

 

 Manufacturing Controlled Impedance PCBs

 As the operating speed of electronic circuits has increased, so has the need for PCBs to have controlled characteristic impedances and the majority of PCB manufacturers are producing them. As described earlier, if the value of characteristic impedance is incorrect, it can be very difficult to identify the problem once the PCB is assembled. Since the impedance depends on many parameters (trace width, trace thickness, laminate thickness, etc.) the majority of PCBs are currently 100% tested for controlled impedance. However the testing is not normally performed on the actual PCB but on a test coupon manufactured at the same time and on the same panel as the PCB. Sometimes the test coupon is integrated into the main PCB.

Sometimes your PCB customer is not aware that testing is best accomplished using test coupons and you, as the PCB manufacturer, will need to explain the benefits of coupons which include:

Test Coupons

The typical test coupon is a PCB approximately 200x30mm with exactly the same layer and trace construction as the main PCB. It has traces which are designed to be the same width and on the same layer as the controlled impedance traces on the main PCB.

In addition to the usual PCB specifications, the PCB designer should specify:

* Which layers contain controlled impedance traces

* The impedance(s) of the trace(s) (there can be more than one value of impedance trace per layer)

* Separate aperture codes for controlled impedance traces e.g. 4 mil non controlled impedance trace and 4 mil controlled impedance trace.

* And either: 1. the width (w) of the controlled impedance trace or 2. the laminate thickness (h) adjacent to the controlled impedance trace

In case 1, where trace width (w) is specified, the manufacturer will adjust the laminate thickness (h) to give the correct value of impedance. In case 2 where the laminate thickness (h) is specified, the manufacturer will adjust the trace width (w) to achieve the value of impedance. In all cases it is advisable for designer and fabricator to discuss the possible solutions to ensure a cost effective and manufacturable stackup.

Exploded view of a test coupon 

 Typical Test Coupon

 Capacitive loading

To minimise capacitive loading during test, you should minimise the size of pads and vias on coupons, especially for high impedance traces. A coupon design with pads at both ends, gives you the option to test for trace taper. If the trace rises from one end and falls from the other the line is tapered. If it rises when measured from either end there is dc resistance in the line and this needs to be accounted for with dc resistance compensation or launch point extrapolation before analysis with a field solver.

Calculating the value of impedance using field solvers and documenting stackups with layer stackup design tools

You will need to use Field Solver software for calculation of PCB controlled impedances. Their effectiveness is enhanced if they offer “goal seeking” that lets you enter the desired impedance and the field solver calculates the trace dimensions.

To see Polar solvers in action please contact us (find contacts at polarinstruments.com) or watch the introductory videos on the Polar YouTube channel www.youtube.com/polarinstruments.

Characterising your manufacturing process

Using Field Solver software is a good starting point for obtaining nominal values of trace width (w) and laminate thickness (h) to obtain specific values of impedance. However if you are a fabricator moving to impedance control for the first time you will need to produce test panels containing many coupon designs, with different trace widths, different configurations (Stripline, Microstrip, Embedded Microstrip) and different layer structures with different laminate / pre-preg thicknesses, in order to get familiar before quoting on live jobs.

After manufacture of the test panels, you will then need to measure the actual values of impedance and see how they correlate against theoretical values. Laminate suppliers will provide you with lists of Er (dielectric constant) for different core constructions, typically FR4 has Er approximately equal to 4.2.

By constructing a table of results comparing the measured values with the calculated values, you will see the variance between your process and the theoretical calculations. You can then remake the test panels, altering (w) and / or (h) to obtain the “exact” design values of impedance.

Impedances typically range between 40 ohms to 120 ohms. The higher impedances are more difficult to control since they typically have narrower traces and will be relatively more affected by the exact etch process (i.e. since the impedance is inversely proportional to the trace width and thickness, as traces become very thin, the relative effect of the etching process will have a greater effect on their width and profile and hence, impedance).

The following relationships will give you an idea of how impedance depends on dimensions, however please remember they are only approximations for fine line widths:

• Impedance is inversely proportional to trace width

• Impedance is inversely proportional to trace thickness

• Impedance is proportional to laminate height

• Impedance is inversely proportional to the square root of laminate Er

Measuring controlled impedances

Polar Instruments designs and manufactures rugged Controlled Impedance Test Systems specifically for PCB measurements in the manufacturing environment.

Polar is a world leader supplying instruments to premier PCB manufacturers around the globe.

Impedances can be measured using:

* A Network Analyser

* A laboratory Time Domain Reflectometer (TDR)

* A Controlled Impedance Test System (employing TDR techniques)

A TDR specifically appropriate for the measurement of PCB controlled impedance in a manufacturing plant should be able to:

* Be operated reliably and conveniently in the normal plant environment by a non-technical person with minimum training requirement.

* Offer a degree of test automation for high throughput lines.

* Produce easy-to-understand results in the form of graphs of impedance versus distance over the length of the test coupon.

* Indicate and log unequivocal Pass/Fail results for each device tested.

* Datalog results and produce reports suitable for presentation to the customer.

* Store test files which contain the specifications for each type of coupon produced, and automatically set up the TDR.

* Be able to remove the effects of thin traces from the measurement with dc resistance compensation or launch point extrapolation.

Differential configurations

Many designs use a differential pair of traces between components. When compared to a single line trace (single ended), differential configurations are less susceptible to interference from adjacent traces and generate less interference.

To be effective, they need to be matched i.e.:

• Both traces should have the same dimensions and spacing to adjacent traces and planes

• The traces should be as close as possible to each other as the manufacturing process allows

• The spacing between the two traces should be constant

The value of the characteristic impedance depends on the trace separation as well as the dimensions of the individual traces and when you are measuring them, you will need to make a differential measurement. Typically the differential measurement will be slightly less than twice the value of the impedance of each trace e.g. if you measure each individual trace of a 100Ω differential pair, they are both likely to read around 53Ω or 55Ω.

Differential pairs operate with a positive signal on one line and a negative on the other. Depending on how close or far apart they are some of the return current will flow back to the probe via the underlying plane (100% if they are far apart) that’s why there are 3 (2 signal and a ground) or 4 pins (2 signal and 2 ground) on a differential probe.

In some specialist applications there is no plane adjacent to the pair. (Under ethernet connectors for example). Polar has specialist probes with internal circuitry to measure these “groundless differential” traces. Microwave engineers would call these “balanced lines” as all the outbound current returns in the return side of the pair.

If you would like to learn more and why you should really think in terms of return current rather than ground it is worth investing in Dr. Eric Bogatin’s comprehensive book: “Bogatins Practical Guide to Transmission Line Design and Characterization for Signal Integrity Applications”

Coplanar configurations

Coplanar configurations have become increasingly popular in the past few years. One of the benefits of surface coplanar configurations is that they extend the operating frequency of FR4 laminate, which loses performance above 2Ghz. In surface coplanar, most of the field between the trace and plane is through air rather than the laminate and so the loss caused by the laminate has less effect at high frequencies.

There are many useful variants of coplanar configurations. For example using a surface coplanar waveguide can make a flex impedance controlled circuit more flexible because the return paths are on the same layer as the signal. Traditional return paths on the layer below or above will create a virtual mechanical stiff I-beam which is difficult to fold. The coplanar line also has better high speed behaviour than the use of crosshatched ground planes.

On thin multilayers it can be necessary to reference to a plane below the immediately adjacent one in order to keep the trace width a reasonable size to manufacture. For this purpose the coated coplanar with cutout ground can show how wide the cutout needs to be “to keep it out of harms way”. 

A brief insight into insertion loss 

As speeds increase above 2GHz to 5GHz losses in the laminate (dielectric loss) progressively in the laminate rob the signal of its power turning the signal into heat in much the same way materials heat in a microwave oven. Likewise electrical effects force the current to travel only on the outer surface of the copper trace (“Skin Effect”)”. Effective resistance increases, which further dissipates power

A designer can approach control of insertion loss in a number of ways. For instance simply keeping the traces short reduces insertion losses because it is proportional to length. Lower loss laminate materials may be chosen albeit at higher cost, and also smoother copper which mitigates the effects of roughness when all the current is travelling on the surface of the trace.

As you can see the drivers for loss are quite different from those for impedance, and the use of smooth copper may mean a fabricator needs to change processes to avoid the risk of delamination.

Unlike in lower speed designs the silicon in ultra high speed communications can also deploy pulse shaping on both the transmit and receive side of the circuits, using similar techniques to those used for speeding up broadband connections on copper cables.

You may hear the terms “pre emphasis” and “equalisation” to describe this. Polar has field solvers and stackup tools which extend the capability beyond characteristic impedance to also model the insertion loss. Si9000e and Speedstack Si both offer these extended capabilities.

Typical Questions and Answers

Q. My customer says I need to test their PCBs at 900MHz. Can I do this with a TDR based test system?

A. Yes, a TDR based impedance test system is suitable for testing over a wide range of frequencies. The parameters that determine impedance (laminate Er) do not vary significantly below 3 to 4GHz. So it is unnecessarily expensive and time consuming to do a single frequency test using a network analyser. Remember that characteristic impedance only changes slightly with frequency.

Q. My customer does not specify that I measure controlled impedances,what should I do?

A. A designer may think that by specifying the dimensions, the traces will automatically have the correct value of impedance. As explained earlier, each manufacturing process requires characterisation to ensure that the process is matched to nominal values produced by Field Solver calculations. Work in partnership with your board specifier customer and help them understand the need for test.

Q. How do I calculate the dimensions for controlled impedances on inner layers on my stack up?

A. You can ignore any layers that are beyond the planes either side of the trace being calculated. You only need to consider the laminate thicknesses either side of the trace to the nearest planes on both sides.You can think of this as the plane forming a shield either side of the trace. If you have many impedance controlled traces and high layer counts Speedstack will save you time and provide accurate documentation.

Q. Why are all of the impedance measurements on my coupon wrong but the dimensions agree with the Field Solver?

A. You may have forgotten to connect all of the planes to each other. This is necessary to obtain the correct values. Remember that this should be done on the coupon only and you should leave a void around the coupon to avoid these interconnections affecting bare board test if the coupon is attached. You should also check that the impedance test probe is oriented the correct way with the ground side connected to the return from the reference plane

Polar tools for Stackup design impedance & insertion loss modelling and measurement

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