1. SystemVerilog 3.1a Language Reference Manual 链接:https://pan.baidu.com/s/1Cs1G4kaeWILXvTIKfZhafw 提取码:open 2. IEEE verilog SystemVerilog标准 链接:https://pan.baidu.com/s/1JfhTu3TXpbP6bwIJwcbk_w 提取码:open