BUSMASTER LDF编辑工具制作LDF文件

本文摘要：本文章介绍如何使用BUSMASTER V3.2.2软件中的LDF编辑工具制作LDF文件

使用软件：BUSMASTER V3.2.2 -> LDF Editor

软件下载地址：

https://download.csdn.net/download/m0_50669075/85190261

以下叙述的步骤只是为了描述清晰，实际开发可以不按照以下步骤进行。

1. 打开LDF Editor

2. 新建LDF文件，选择LDF版本

3. 配置Master（主机参数）

4.  配置Slaves（从机参数）

5. 添加Diagnostic Frames（诊断帧）

6. 添加Signals（信号）

6.1 信号为组成一帧报文的基本单位，注意自身需求添加

6.2 有的需求里带有错误信号，如若没有则自行添加一个1bit的错误信号，然后在从机节点里选中（每个从机节点必须有一个错误帧）

7. 添加Unconditional Frames（无条件帧），或根据自身要求添加Event Triggered（事件帧）或Sporadic Frames（零星帧）

7.1 帧参数配置

7.2 帧包含信号位置配置

7.3  完成帧的添加

8. 添加Schedule Tables（调度表）

9. 至此已完成了LDF文件的制作，保存文件后，以txt打开LDF文件，会发现有很多内容是缺失的，需要我们自行补充

9.1 Nodes（节点）处内容可能缺失

9.2 configurable_frames（配置帧）处可能缺失 

9.3 给一个较为标准的LDF文件以供参考修改

/*---------GLOBAL DEFINITIONS-----------*/
LIN_description_file;
LIN_protocol_version             = "2.1";
LIN_language_version             = "2.1";
LIN_speed                        = 19.2 kbps;
/* ----------NODE DEFINITIONS---------- */
Nodes {
   Master:
      HU,                                                    /* Master node name */
      5 ms,                                                  /* Time base */
      0.1 ms;                                                /* Jitter */
   Slaves:
      PGSSS,                                                 /* Slaves node name */
      DRSSS,
      RLSSS,
      RRSSS;
}
/* ----------SIGNAL DEFINITIONS---------- */
Signals {
   /* Signal_name                : Size,                              Init,            Publisher, Subscriber(s) */
   Switch_P_up                   :  3,                                0x00,                   HU, PGSSS;
   Switch_P_down                 :  3,                                0x00,                   HU, PGSSS;
   Switch_P_left                 :  3,                                0x00,                   HU, PGSSS;
   Switch_P_right                :  3,                                0x00,                   HU, PGSSS;
   Switch_P_ok                   :  3,                                0x00,                   HU, PGSSS;
   Switch_P_ok_03                :  1,                                0x00,                PGSSS, HU;
   SWR_Backlight_Sta             :  8,                                0x00,                PGSSS, HU;
   Switch_D_up                   :  3,                                0x00,                   HU, DRSSS;
   Switch_D_down                 :  3,                                0x00,                   HU, DRSSS;
   Switch_D_left                 :  3,                                0x00,                   HU, DRSSS;
   Switch_D_right                :  3,                                0x00,                   HU, DRSSS;
   Switch_D_ok                   :  3,                                0x00,                   HU, DRSSS;
   Switch_D_ok_1d                :  1,                                0x00,                DRSSS, HU;
   SWCL_Backlight_Sta            :  8,                                0x00,                DRSSS, HU;
   Switch_RL_ok                  :  3,                                0x00,                   HU, RLSSS;
   Switch_RL_ok_13               :  1,                                0x00,                RLSSS, HU;
   SWCL_Backlight_Sta_13         :  8,                                0x00,                RLSSS, HU;
   Switch_RR_ok                  :  3,                                0x00,                   HU, RRSSS;
   Switch_RR_ok_19               :  1,                                0x00,                RRSSS, HU;
   SWCL_Backlight_Sta_19         :  8,                                0x00,                RRSSS, HU;
}
/* ----------DIAGNOSTIC SIGNAL DEFINITIONS---------- */
Diagnostic_signals {
   /* MasterReq Reserved Signals */
   MasterReqB0         :    8,   0;
   MasterReqB1         :    8,   0;
   MasterReqB2         :    8,   0;
   MasterReqB3         :    8,   0;
   MasterReqB4         :    8,   0;
   MasterReqB5         :    8,   0;
   MasterReqB6         :    8,   0;
   MasterReqB7         :    8,   0;
   /* SlaveResp Reserved Signals */
   SlaveRespB0         :    8,   0;
   SlaveRespB1         :    8,   0;
   SlaveRespB2         :    8,   0;
   SlaveRespB3         :    8,   0;
   SlaveRespB4         :    8,   0;
   SlaveRespB5         :    8,   0;
   SlaveRespB6         :    8,   0;
   SlaveRespB7         :    8,   0;
}
/* ----------UNCONDITIONAL FRAME DEFINITIONS---------- */
Frames {
   SmtSwt_SWC_Switch_Passger: 0x02, HU                  ,    3 {
      Switch_P_up         , 0;
      Switch_P_down       , 3;
      Switch_P_left       , 8;
      Switch_P_right      , 11;
      Switch_P_ok         , 16;
   }
   SmtSwt_SWC_Switch_Passger_Sta: 0x03, PGSSS               ,    3 {
      Switch_P_ok_03      , 0;
      SWR_Backlight_Sta   , 9;
   }
   SmtSwt_SWC_Switch_Drive: 0x1C, HU                  ,    3 {
      Switch_D_up         , 0;
      Switch_D_down       , 3;
      Switch_D_left       , 8;
      Switch_D_right      , 11;
      Switch_D_ok         , 16;
   }
   SmtSwt_SWC_Switch_Drive_Sta: 0x1D, DRSSS               ,    3 {
      Switch_D_ok_1d      , 0;
      SWCL_Backlight_Sta  , 9;
   }
   SmtSwt_SWC_Switch_RearL: 0x12, HU                  ,    1 {
      Switch_RL_ok        , 0;
   }
   SmtSwt_SWC_Switch_RL_Sta: 0x13, RLSSS               ,    3 {
      Switch_RL_ok_13     , 0;
      SWCL_Backlight_Sta_13, 9;
   }
   SmtSwt_SWC_Switch_RearR: 0x18, HU                  ,    1 {
      Switch_RR_ok        , 0;
   }
   SmtSwt_SWC_Switch_RR_Sta: 0x19, RRSSS               ,    3 {
      Switch_RR_ok_19     , 0;
      SWCL_Backlight_Sta_19, 9;
   }
}
/* ----------DIAGNOSTIC FRAME DEFINITIONS---------- */
Diagnostic_frames {
   MasterReq           : 0x3C {
      MasterReqB0         , 0;
      MasterReqB1         , 8;
      MasterReqB2         , 16;
      MasterReqB3         , 24;
      MasterReqB4         , 32;
      MasterReqB5         , 40;
      MasterReqB6         , 48;
      MasterReqB7         , 56;
   }
   SlaveResp           : 0x3D {
      SlaveRespB0         , 0;
      SlaveRespB1         , 8;
      SlaveRespB2         , 16;
      SlaveRespB3         , 24;
      SlaveRespB4         , 32;
      SlaveRespB5         , 40;
      SlaveRespB6         , 48;
      SlaveRespB7         , 56;
   }
}
/* ----------NODE ATTRIBUTE DEFINITIONS---------- */
Node_attributes {
   PGSSS {
      LIN_protocol               = "2.1";                    /* Node protocol version */
      configured_NAD             = 0x0A;                     /* configured NAD of node */
      initial_NAD                = 0x0A;                     /* initial NAD of node */
      product_id                 = 0x0A, 0x0A, 0x0A;         /* Product id */
      response_error             = Switch_P_ok_03;           /* Response error signal */
      P2_min                     = 50 ms;                    /* P2_min */
      ST_min                     = 0 ms;                     /* ST_min */
      N_As_timeout               = 1000 ms;                  /* N_As_timeout */
      N_Cr_timeout               = 1000 ms;                  /* N_As_timeout */
      configurable_frames {
         SmtSwt_SWC_Switch_Passger;
         SmtSwt_SWC_Switch_Passger_Sta;
      }
   }
   DRSSS {
      LIN_protocol               = "2.1";                    /* Node protocol version */
      configured_NAD             = 0x09;                     /* configured NAD of node */
      initial_NAD                = 0x09;                     /* initial NAD of node */
      product_id                 = 0x09, 0x09, 0x09;         /* Product id */
      response_error             = Switch_D_ok_1d;           /* Response error signal */
      P2_min                     = 50 ms;                    /* P2_min */
      ST_min                     = 0 ms;                     /* ST_min */
      N_As_timeout               = 1000 ms;                  /* N_As_timeout */
      N_Cr_timeout               = 1000 ms;                  /* N_As_timeout */
      configurable_frames {
         SmtSwt_SWC_Switch_Drive;
         SmtSwt_SWC_Switch_Drive_Sta;
      }
   }
   RLSSS {
      LIN_protocol               = "2.1";                    /* Node protocol version */
      configured_NAD             = 0x0B;                     /* configured NAD of node */
      initial_NAD                = 0x0B;                     /* initial NAD of node */
      product_id                 = 0x0B, 0x0B, 0x0B;         /* Product id */
      response_error             = Switch_RL_ok_13;          /* Response error signal */
      P2_min                     = 50 ms;                    /* P2_min */
      ST_min                     = 0 ms;                     /* ST_min */
      N_As_timeout               = 1000 ms;                  /* N_As_timeout */
      N_Cr_timeout               = 1000 ms;                  /* N_As_timeout */
      configurable_frames {
         SmtSwt_SWC_Switch_RearL;
         SmtSwt_SWC_Switch_RL_Sta;
      }
   }
   RRSSS {
      LIN_protocol               = "2.1";                    /* Node protocol version */
      configured_NAD             = 0x0C;                     /* configured NAD of node */
      initial_NAD                = 0x0C;                     /* initial NAD of node */
      product_id                 = 0x0C, 0x0C, 0x0C;         /* Product id */
      response_error             = Switch_RR_ok_19;          /* Response error signal */
      P2_min                     = 50 ms;                    /* P2_min */
      ST_min                     = 0 ms;                     /* ST_min */
      N_As_timeout               = 1000 ms;                  /* N_As_timeout */
      N_Cr_timeout               = 1000 ms;                  /* N_As_timeout */
      configurable_frames {
         SmtSwt_SWC_Switch_RearR;
         SmtSwt_SWC_Switch_RR_Sta;
      }
   }
}
/* ----------SCHEDULE TABLE DEFINITIONS---------- */
Schedule_tables {
   NormalTable {
      SmtSwt_SWC_Switch_Passger                          delay 50 ms;
      SmtSwt_SWC_Switch_Passger_Sta                      delay 50 ms;
      SmtSwt_SWC_Switch_Drive                            delay 50 ms;
      SmtSwt_SWC_Switch_Drive_Sta                        delay 50 ms;
      SmtSwt_SWC_Switch_RearL                            delay 50 ms;
      SmtSwt_SWC_Switch_RL_Sta                           delay 50 ms;
      SmtSwt_SWC_Switch_RearR                            delay 50 ms;
      SmtSwt_SWC_Switch_RR_Sta                           delay 50 ms;
   }
}

10. 手动补充完成后重新用LDF Editor打开，成功打开即为制作完成

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