Also include an active-high synchronous reset that resets the state machine to a state equivalent to if the water level had been low for a long time (no sensors asserted, and all four outputs asserted).
module top_module (
input clk,
input reset,
input [3:1] s,
output fr3,
output fr2,
output fr1,
output dfr
);
parameter st0 = 0, st1 = 1, st2 = 3, st3 = 7; //规定水位的四个状态
reg [3:1] previous, next;
reg prereset;
always @(posedge clk) begin
if (reset == 1) begin dfr = 1; fr1 = 1; fr2 = 1; fr3 = 1; end
else begin
dfr = (prereset == 1) ? 0 : dfr; //如果遇到reset归零,将dfr清零(题目要求)
case (next)
st0: begin dfr = 1; fr1 = 1; fr2 = 1; fr3 = 1; end
st1: case (previous) //对于状态1,根据之前的状态有三种情况,关键在于如果之前状态为1,则dfr保持不变
st0: begin dfr = 0; fr1 = 1; fr2 = 1; fr3 = 0; end
st1: begin dfr = dfr; fr1 = 1; fr2 = 1; fr3 = 0; end
st2: begin dfr = 1; fr1 = 1; fr2 = 1; fr3 = 0; end
endcase
st2: case (previous)
st1: begin dfr = 0; fr1 = 1; fr2 = 0; fr3 = 0; end
st2: begin dfr = dfr; fr1 = 1; fr2 = 0; fr3 = 0; end
st3: begin dfr = 1; fr1 = 1; fr2 = 0; fr3 = 0; end
endcase
st3: case (previous)
st2: begin dfr = 0; fr1 = 0; fr2 = 0; fr3 = 0; end
st3: begin dfr = dfr; fr1 = 0; fr2 = 0; fr3 = 0; end
endcase
endcase
end
previous = next; //记录此时刻的状态,作为下一时刻的前状态
prereset = reset;
end
assign next = s;
endmodule