1、默认SDK开机串口打印:
DDR Version V1.03 20200804
LPDDR3, 328MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=16 Size=1024MB
change to: 328MHz
change to: 528MHz
change to: 784MHz
change to: 924MHz(final freq)
out
U-Boot SPL board init
2、SDK提供了rv1126_ddr_784MHz_v1.03.bin
diff --git a/rkbin/RKBOOT/RV1126MINIALL.ini b/rkbin/RKBOOT/RV1126MINIALL.ini
index f7233fd..9ebb1db 100755
--- a/rkbin/RKBOOT/RV1126MINIALL.ini
+++ b/rkbin/RKBOOT/RV1126MINIALL.ini
@@ -5,7 +5,7 @@ MAJOR=1
MINOR=1
[CODE471_OPTION]
NUM=1
-Path1=bin/rv11/rv1126_ddr_924MHz_v1.03.bin
+Path1=bin/rv11/rv1126_ddr_784MHz_v1.03.bin
Sleep=1
[CODE472_OPTION]
NUM=1
@@ -14,7 +14,7 @@ Path1=bin/rv11/rv1126_usbplug_v1.11.bin
NUM=2
LOADER1=FlashData
LOADER2=FlashBoot
-FlashData=bin/rv11/rv1126_ddr_924MHz_v1.03.bin
+FlashData=bin/rv11/rv1126_ddr_784MHz_v1.03.bin
FlashBoot=bin/rv11/rv1126_spl_v1.03.bin
[OUTPUT]
PATH=rv1126_spl_loader_v1.03.103.bin
3、使用ddrbin_tool修改lp3_freq=784
diff --git a/rkbin/tools/ddrbin_param.txt b/rkbin/tools/ddrbin_param.txt
index 2f7191d..46de707 100644
--- a/rkbin/tools/ddrbin_param.txt
+++ b/rkbin/tools/ddrbin_param.txt
@@ -2,7 +2,7 @@ start tag=0x12345678
ddr2_freq=
lp2_freq=
ddr3_freq=
-lp3_freq=
+lp3_freq=784
ddr4_freq=
lp4_freq=
@@ -36,11 +36,11 @@ lp2_f3_freq_mhz=
lp2_f4_freq_mhz=
lp2_f5_freq_mhz=
-lp3_f1_freq_mhz=
-lp3_f2_freq_mhz=
-lp3_f3_freq_mhz=
-lp3_f4_freq_mhz=
-lp3_f5_freq_mhz=
+lp3_f1_freq_mhz=396
+lp3_f2_freq_mhz=528
+lp3_f3_freq_mhz=664
+lp3_f4_freq_mhz=784
+lp3_f5_freq_mhz=924
lp4_f1_freq_mhz=
lp4_f2_freq_mhz=
============================================================
rockemd@rockemd:tools$ ./ddrbin_tool ddrbin_param.txt ../bin/rv11/rv1126_ddr_924MHz_v1.03.bin
version v1.03 20200720
argument 1 : Input param filename(.txt)
argument 2 : Input ddr bin filename(.bin)
new bin config:
lp3_freq: 784
lp3_f1_freq_mhz: 396
lp3_f2_freq_mhz: 528
lp3_f3_freq_mhz: 664
lp3_f4_freq_mhz: 784
lp3_f5_freq_mhz: 924
modify end
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