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相关数据手册资料，
When user clears interrupt pending, user must write 0 to all the VICADDRESS registers (VIC0ADDRESS,
VIC1ADDRESS, VIC2ADDRESS, and VIC3ADDRESS).
Specifies（指定） the IRQ Status Register
A write of any value to this register clears the current interrupt.
A write must only be performed at the end of an interrupt service routine.
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