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逻辑代数
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李十一11
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数字电路:常见的锁存器浅析
由于S-R/S'-R'锁存器在所有时间内对输入都是敏感的,我们期望有一种器件,它只有在使能输入C有效时,才对输入敏感,具有使能端的S-R锁存器(S-R latch with enable)应运而生。总之,作者认为,只要掌握了S-R锁存器,S'-R'锁存器只不过是将输入信号进行反转,我们通过相应的分析即可得出S'-R'锁存器的输出。总结,本次我们介绍了S-R锁存器,S'-R'锁存器,具有使能端的S'-R'锁存器,D锁存器。①S,R均为0,S-R锁存器相当于双稳态元件,通过反馈回路维持电路之前的状态。...原创 2022-08-17 12:58:27 · 3984 阅读 · 1 评论 -
【HDLBits刷题】Exams/ece241 2014 q3.
For the following Karnaugh map, give the circuit implementation using one 4-to-1 multiplexer and as many 2-to-1 multiplexers as required, but using as few as possible. You are not allowed to use any other logic gate and you must useaandbas the multiple...原创 2022-04-21 22:19:17 · 1451 阅读 · 0 评论 -
【HDLBits刷题】Exams/ece241 2013 q2.
A single-output digital system with four inputs (a,b,c,d) generates a logic-1 when 2, 7, or 15 appears on the inputs, and a logic-0 when 0, 1, 4, 5, 6, 9, 10, 13, or 14 appears. The input conditions for the numbers 3, 8, 11, and 12 never occur in this syst原创 2022-04-20 22:10:35 · 2604 阅读 · 0 评论 -
【HDLBits刷题】Kmap4.
Implement the circuit described by the Karnaugh map below.Try to simplify the k-map before coding it. Try both product-of-sums and sum-of-products forms. We can't check whether you have the optimal simplification of the k-map. But we can check if you原创 2022-04-20 20:59:05 · 995 阅读 · 0 评论 -
数字逻辑电路——原码,反码,补码
https://blog.csdn.net/qq_45838676/article/details/106146093原创 2022-04-18 22:17:32 · 1631 阅读 · 0 评论