代码从Quartus ii 13.0到ISE 14.2出现的小问题

问题：将代码从Quartus ii 13.0移到ISE 14.2时，运行结果不正确。

代码：

module UartRxd_9600 (Clk,Rst,D_Rxd,D_Rx_Data,Rx_S_IsDone);
input Clk,Rst,D_Rxd;
output [7:0] D_Rx_Data;
output Rx_S_IsDone;

//----------------
reg S_reg1,S_reg2,S_reg3,S_reg4;
wire S_Sta_H2L;
wire C_BPS_Clk;
reg S_cnt = 0;
reg S_IsDone = 0;
reg [12:0] C_cnt_BPS;
reg [3:0] num;
reg [7:0] D_Rx_temp_data ;

//------------沿检测---------------------------
always@(posedge Clk)//沿检测
begin
	if(!Rst) 
	begin
		S_reg1<=1'b0;
		S_reg2<=1'b0;
		S_reg3<=1'b0;
		S_reg4<=1'b0;
	end  
	else 
	begin 
		S_reg1<=D_Rxd ;
		S_reg2<=S_reg1;
		S_reg3<=S_reg2;
		S_reg4<=S_reg3;
	end 
end

assign  S_Sta_H2L = S_reg4 & S_reg3 & (~S_reg2 ) & (~S_reg1);

//-------------BPS----------------------			
always@(posedge Clk)
begin
	if(!Rst)
		C_cnt_BPS <= 13'd0;
	else if(C_cnt_BPS == 13'd520