SSD内部逻辑结构——Chip与Package的误解

SSD内部逻辑结构的误解
Chip不是黑色树脂封装的NAND颗粒

最终结果
分类1：Flash array > Channel                    >Chip(Target)  >Die/LUN > Plane > Block > Page
分类2：Flash array > Channel > Package(Device)  > Chip(Target) > Die/LUN > Plane > Block > Page

1. 常用学术研究——SSD逻辑存储结构

• 注：图中Page不是完全正确，因为一个Wordline因奇偶BitLine和Cell类型存在多个Page

• - Flash memory array = 多个Channel
  - 1 个Channel = 多个Chip
  - 1 个Chip = 多个 Die/LUN
  - 1 个Die/LUN = 多个 Plane
  - 1 个Plane = 多个Block
  - 1 个Block = 多个Page
  - 1 个Page = 多个SubPage
  

Flash array > Channel > Chip > Die/LUN > Plane > Block > Page > SubPage

2. 工业ONFI和Toggle 规范——NAND内部逻辑存储结构

• ONFI 规范文档描述

device The packaged NAND unit. A device consists of one or more NAND Targets.

NAND Target A set of LUNs that share one CE_n signal within one NAND package.

LUN (logical unit number) The minimum unit that can independently execute commands and report status. There are one or more LUNs per NAND Target.

block Consists of multiple pages and is the smallest addressable unit for erase operations.

page The smallest addressable unit for read and program operations.

Flash array > Channel > Device(Chip) > Target > Die/LUN > Plane > Block > Page

CHIP ENABLE The Chip Enable signal selects the target. When Chip Enable is high and the target is in the ready state, the target goes into a low-power standby state. When Chip Enable is low, the target is selected. See section 2.9 for additional requirements.

• Toggle 规范文档描述

Device The packaged NAND unit. A device may contain more than a target. A device contains one or more targets.

Target An independent NAND Flash component with its own CE signal. A target is controlled by one CE signal. A target is organized into one or more logical units (LUNs).

LUN (Logical Unit Number) The minimum unit that can independently execute commands and report status. There are one or more LUNs per CE . A logical unit (LUN) is the minimum unit that can independently execute commands and report status. Specifically, separate LUNs may operate on arbitrary command sequences in parallel. A LUN contains at least one page register and a Flash array.

Plane The unit that consists of a number of blocks. There are one or more Planes per LUN. number of plane operations supported for the LUN , plane addressing may be used to execute additional dependent operations in parallel.

Block Consists of multiple pages and is the smallest addressable unit for the Erase operation. A block is the smallest erasable unit of data within the Flash array of a LUN. A block contains a number of pages.

Page The smallest addressable unit for the Read and the Program operations. A page is the smallest addressable unit for read and program operations. parallel page operations within a plane may be used if its functionality is supported by the device.

Flash array > Channel > Device(Chip) > Target > Die/LUN > Plane > Block > Page

即ONFI和Toggle规范是完全一致的，仅Toggle规范中在一个Plane中描述了Page Register和Cache Register，但ONFI仅描述Page Register。

CHIP ENABLE The CE input is the device selection control. When the device is in the Busy state, CE high is ignored, and the device does not return to standby mode in program or erase operation.

• 2017 Toggle 规范中设备参数
  

20813266944/14082048=1478 Block/Plane；1478*2=2956 Block/LUN

前面论文中常省略了Target，即算LUN/Device=Die/Chip=1*2 Die/Chip

3. 最终逻辑存储结构

• All chips in a package share the same 8/16-bit-I/O bus but have separated chip enable (CE) and ready/busy (R/B) control signals. At present, major Flash packages use 8-bit wide I/O bus. Without special explanation, I/O bus is by default 8-bit wide in the following paper. Each chip is composed of multiple dies. Each die has one internal R/B signal invisible to users and valid only in advanced commands. Each die is composed of multiple planes. Each plane contains thousands of Flash blocks and one data register (Some products’plane contains an extra cache register). A flash block typically consists of 64 or 128 pages, where a page is further divided into many 512-byte subpages, which equals a typical sector size. Each subpage has 16-byte spare space used to store metadata. While chips and dies are often confused with each other in many previous studies in the literature, CE and R/B signals make them clearly distinct from each other. A chip is a basic service unit that has its independent CE and R/B signals. A die is a component of a chip, which has an internal R/B signal only.

  Flash array > Channel > Package(Device) > Chip(Target) > Die/LUN > Plane > Block > Page
  

----2013-TC-Exploring and Exploiting the Multilevel Parallelism Inside SSDs for Improved Performance and Endurance

• 最终确定

常用学术研究	Flash array > Channel> Chip >Die/LUN > Plane > Block > Page
ONFI规范	Flash array > Channel > Device > Target > Die/LUN > Plane > Block > Page
Toggle规范	Flash array > Channel > Device > Target > Die/LUN > Plane > Block > Page
2013-TC	Flash array > Channel > Package(Device) > Chip(Target) > Die/LUN > Plane > Block > Page
我1	Flash array > Channel >Chip(Target) >Die/LUN > Plane > Block > Page
我2	Flash array > Channel > Package(Device) > Chip(Target) > Die/LUN > Plane > Block > Page

1. 以上所有标准都是正确的，但注意学术研究中的Chip是规范中的Target，而不是指的具体肉眼可见的黑色封装的芯片或颗粒，依靠Chip Enable单元来确定Chip。

2. 一般情况学术研究逻辑单元不会注重Pacakage或Device，同一个Package甚至同一Channel共享1个IO总线，即同一Channel不同Package的Chip是完全一样的。而且管脚是一样的。所以用Target，学术研究称为Chip。

3. 以后注意学术研究的Chip单元和实际的封装颗粒不一样。而且使用的Chip Enable数=Chip数=Target数。Die=LUN，ChipEnable的Chip就是Chip，因为有单独的管脚。

参考芯片：
Micron-29F256G08CJAAA-data sheet（详细说明）
2007-SamSung SSD K9F8G08UXM Data Sheet（无Target概念）【Chip和Package误解根源，因为那时没有该概念】
Hynix-H27UCG8T2BTR data sheet（无Target概念）
参考规范：
NAND ONFI Specification 5.0-2021
NAND Toggle Specification 2017