VHDL编程中遇到该错误:
found ‘0’ definitions of operator “+”, cannot determine exact overloaded matching definition for “+”
原因:
可能是没有引入STD_LOGIC_UNSIGNED程序包
解决:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
…
found ‘0‘ definitions of operator “+“
最新推荐文章于 2023-08-21 10:35:09 发布