msp432快速入门第一节之找齐资料

msp432快速入门系列(一)

老话说:授人以鱼不如授人以渔,这里我会讲一下自己如何快速入门一款单片机,便于回看,在2020年省赛我被430折磨,故今年提前准备。主要是记录自己的方法,仅仅代表个人观点。

(1)需要的资料整理

先看一下大概需要的资料 ,我手里是TI的msp432p401r 小火箭板(红色),对于先入门一款单片机,可以先想一下我们需要的资料:
(1)usermanual,各种外设的使用在这里;
(2)datasheet,主要看一下电气特性以及引脚复用
(3)相应的sdk,TI官方应该有,最好SDK里边有例子程序,那么可以直接用了,当然重新整理下也不错。
(4)板子的原理图,其他就不太需要了,
那么我们按照需要挨个找链接下载。

(2)TI官网下载资料

去TI下载东西还会询问你需求是不是用在国防还是民用,格调一下上来了,下附各部分资料链接:
(1)datasheet和usermanual在一起 https://www.ti.com.cn/product/cn/MSP432P401R?keyMatch=MSP432P401R%20LAUNCHPAD
在这里插入图片描述
数据表是datasheet,用户指南是usermanual
(2)原理图和SDK
http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSP-EXP432P401R/latest/index_FDS.html
在这里可以下板子的原理图以及SDK,SDK用最新版本的就行,然后原理图下完大概整理下自己的资料,比如我这样
在这里插入图片描述
然后注意的是SDK是一个程序需要安装,跟freertos的安装流程差不多,选择好路径后就直接一路确定就行。

(3)编译环境搭建

我使用的是keil5(mdk5)进行开发,用习惯了比较顺手,调试起来也方便,keil5需要的pack包在TI官网下载,CCS用不习惯,以后的程序也会基于keil来写。附pack包下载链接,在最下边能找到:
http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/msp432cmsis/latest/index_FDS.html
至于下载器,板子上带了一个既可以当cmsis dap的下载器,同时可以充当xds下载器的电路,在keil上直接选dap就行,简易快捷容易使用。

克隆空白工程请使用 git , 如果你觉得还不错欢迎点亮 star !

git clone https://github.com/YGZone/Design-a-car-with-MSP432P401R.git

更多资料可以转步我的个人网站 www.eestr.com ( https://www.eestr.com)或者 Github[https://github.com/YGZone], 欢迎访问

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MSP432 低功耗高性能并存10.1 Digital I/O Introduction The digital I/O features include: • Independently programmable individual I/Os • Any combination of input or output • Individually configurable interrupts for ports (available for certain ports only) • Independent input and output data registers • Individually configurable pullup or pulldown resistors • Wake-up capability from ultra-low power modes (available for certain ports only) • Individually configurable high drive I/Os (available for certain I/Os only) Devices within the family may have up to eleven digital I/O ports implemented (P1 to P10 and PJ). Most ports contain eight I/O lines; however, some ports may contain less (see the device-specific data sheet for ports available). Each I/O line is individually configurable for input or output direction, and each can be individually read or written. Each I/O line is individually configurable for pullup or pulldown resistors. Certain ports have interrupt and wake-up capability from ultra-low power modes (see device specific data sheet for ports with interrupt and wake-up capability). Each interrupt can be individually enabled and configured to provide an interrupt on a rising or falling edge of an input signal. All interrupts are fed into an encoded Interrupt Vector register, allowing the application to determine which sub-pin of a port has generated the event. Individual ports can be accessed as byte-wide ports or can be combined into half-word-wide ports. Port pairs P1 and P2, P3 and P4, P5 and P6, P7 and P8, and so on, are associated with the names PA, PB, PC, PD, and so on, respectively. All port registers are handled in this manner with this naming convention. The main exception are the interrupt vector registers, for example, interrupts for ports P1 and P2 must be handled through P1IV and P2IV, PAIV does not exist. When writing to port PA with half-word operations, all 16 bits are written to the port. When writing to the lower byte of port PA using byte operations,

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