关于兴森快捷做的Sate210-F金手指核心板的抗震能力测试结果

               

           这几天，我带着Sate210-F开发板在公交车，自行车上晃悠，从深圳来回广州，回到家直接插上电，居然还能正常启动，一点问题没有。大大出乎我的预料，因为这种金手指核心板虽然插拔维护容易，但是这个金手指内存接口也让我担心，最怕的是会在开发板运输过程中，核心板因为震动而松动，导致和底板接触不良而启动失败。这个在几年前用过某一家公司的金手指2440 核心板曾经在抗震测试时候遇到这种情况。看来俺们的S5PV210金手指核心板PCB坚持在兴森快捷制作还是非常对的，毕竟这个金手指的接口是要非常可靠的，一般的PCB工厂虽然便宜一半的价格，但是质量不放心啊。

          还有一个重大Sate210-F金手指核心板抗震测试结果来自于快递公司，我目前寄出的五个Sate210-F开发板都是顺风快递和龙邦快递两家公司寄出的，我回访了客户问拿到是否有启动不正常，LCD/VGA显示不正常的现象，客户全部都说没有问题。快递公司的暴力大家是知道的，这样居然没事情说明Sate210-F 金手指核心板PCB工艺已经满足做产品的要求。

           下面看看，经过抗震测试的Sate210-F开发板的启动信息吧。

 OK


U-Boot 1.3.4 (Jan 19 2014 - 00:19:43) for Sate210




CPU:  S5PV210@1000MHz(OK)
        APLL = 1000MHz, HclkMsys = 200MHz, PclkMsys = 100MHz
        MPLL = 667MHz, EPLL = 80MHz
                       HclkDsys = 166MHz, PclkDsys = 83MHz
                       HclkPsys = 133MHz, PclkPsys = 66MHz
                       SCLKA2M  = 200MHz
Serial = CLKUART 
Board:   SMDKV210
DRAM:    512 MB
Flash:   8 MB
SD/MMC:  3776MB
The input address don't need a virtual-to-physical translation : 23e9c008
In:      serial
Out:     serial
Err:     serial
checking mode for fastboot ...
Hit any key to stop autoboot:  0 
reading kernel.. 1073, 8192 
MMC read: dev # 0, block # 1073, count 8192 ...The input address don't need a virtual-to-physical translation : 20008000
8192 blocks read: OK
completed
reading RFS.. 9265, 3072 
MMC read: dev # 0, block # 9265, count 3072 ...The input address don't need a virtual-to-physical translation : 21a00000
3072 blocks read: OK
completed
Boot with zImage
The input address don't need a virtual-to-physical translation : 20008000
get_format
-------- 1 --------
## Loading init Ramdisk from Legacy Image at 21a00000 ...
   Image Name:   ramdisk
   Created:      2014-01-15  14:42:43 UTC
   Image Type:   ARM Linux RAMDisk Image (uncompressed)
   Data Size:    163848 Bytes = 160 kB
   Load Address: 30a00000
   Entry Point:  30a00000
   Verifying Checksum ... OK


Starting kernel ...


Uncompressing Linux... done, booting the kernel.
[    0.000000] Initializing cgroup subsys cpu
[    0.000000] Linux version 3.0.8 (cyt@ubuntu) (gcc version 4.4.1 (Sourcery G++ Lite 2009q3-67) ) #32 PREEMPT Mon Jan 13 06:26:04 PST 2014
[    0.000000] CPU: ARMv7 Processor [412fc082] revision 2 (ARMv7), cr=10c53c7f
[    0.000000] CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] Machine: SMDKV210
[    0.000000] Ignoring unrecognised tag 0x41001099
[    0.000000] Memory policy: ECC disabled, Data cache writeback
[    0.000000] CPU S5PV210/S5PC110 (id 0x43110220)
[    0.000000] S3C24XX Clocks, Copyright 2004 Simtec Electronics
[    0.000000] S5PV210: PLL settings, A=1000000000, M=667000000, E=80000000 V=54000000
[    0.000000] S5PV210: ARMCLK=1000000000, HCLKM=200000000, HCLKD=166750000
[    0.000000] HCLKP=133400000, PCLKM=100000000, PCLKD=83375000, PCLKP=66700000
[    0.000000] sclk_dmc: source is sclk_a2m (0), rate is 200000000
[    0.000000] sclk_onenand: source is hclk_dsys (1), rate is 166750000
[    0.000000] uclk1: source is mout_mpll (6), rate is 66700000
[    0.000000] uclk1: source is mout_mpll (6), rate is 66700000
[    0.000000] uclk1: source is mout_mpll (6), rate is 66700000
[    0.000000] uclk1: source is mout_mpll (6), rate is 66700000
[    0.000000] sclk_mixer: source is sclk_dac (0), rate is 54000000
[    0.000000] sclk_fimc: source is ext_xtal (0), rate is 24000000
[    0.000000] sclk_fimc: source is ext_xtal (0), rate is 24000000
[    0.000000] sclk_fimc: source is ext_xtal (0), rate is 24000000
[    0.000000] sclk_cam0: source is ext_xtal (0), rate is 24000000
[    0.000000] sclk_cam1: source is ext_xtal (0), rate is 24000000
[    0.000000] sclk_fimd: source is ext_xtal (0), rate is 24000000
[    0.000000] sclk_mmc: source is mout_mpll (6), rate is 47642857
[    0.000000] sclk_mmc: source is mout_epll (7), rate is 80000000
[    0.000000] sclk_mmc: source is mout_mpll (6), rate is 47642857
[    0.000000] sclk_mmc: source is mout_epll (7), rate is 80000000
[    0.000000] sclk_mfc: source is sclk_a2m (0), rate is 200000000
[    0.000000] sclk_g2d: source is sclk_a2m (0), rate is 200000000
[    0.000000] sclk_g3d: source is sclk_a2m (0), rate is 200000000
[    0.000000] sclk_csis: source is ext_xtal (0), rate is 24000000
[    0.000000] sclk_spi: source is ext_xtal (0), rate is 24000000
[    0.000000] sclk