五位饱和计数器

源代码：
module counter_5(input clk,input rst,output reg[4:0] cnt
);
parameter MAX=5’b11110;
always@(posedge clk or negedge rst)
begin
if(!rst)
begin
cnt<=5’b00000;
end
else if(cnt==MAX)
begin
cnt<=cnt;
end
else
begin
cnt<=cnt+1’b1;
end
end
endmodule
测试代码：
module tb_counter_5;

// Inputs
reg clk;
reg rst;

// Outputs
wire [4:0] cnt;

// Instantiate the Unit Under Test (UUT)
counter_5 uut (
	.clk(clk), 
	.rst(rst), 
	.cnt(cnt)
);

always #5 clk=~clk;
initial begin
// Initialize Inputs
clk = 0;
rst = 0;

	// Wait 100 ns for global reset to finish
	#100;
	rst=1;
	#400 $finish;
    
	// Add stimulus here

end

endmodule