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于 2023-02-27 19:39:06 发布

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分类专栏： FPGA 文章标签： fpga开发

本文链接：https://blog.csdn.net/qsczxcedczx/article/details/129248360

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    //                                      Polarity     Total_H Total_V Active_H Active_V  Offset_H Offset_V Sync_H Sync_V     pixclk Frame 
    //===============================================================================================================================================
    {VFMT_CEA_02_720x480P_60HZ,           ProgrVNegHNeg,    858,    525,    720,    480,       122,    36,       62,      6   2700,    6000, }, // 2 - 720  x 480p@60                   
    {VFMT_CEA_04_1280x720P_60HZ,          ProgrVPosHPos,   1650,    750,   1280,    720,       260,    25,       40,      5   7425,    6000, }, // 4 - 1280 x 720p@60Hz            
    {VFMT_CEA_05_1920x1080I_60HZ,         InterVPosHPos,   2200,   1125,   1920,   1080,       192,    20,       44,      5   7425,    6000, }, // 5 - 1920 x 1080i@60             
    {VFMT_CEA_06_720x480I_60HZ,           InterVNegHNeg,   1716,    525,   1440,    480,       238,    18,      124,      3   2700,    6000, }, // 6 - 1440 x 480i@60              
    {VFMT_CEA_16_1920x1080P_60HZ,         ProgrVPosHPos,   2200,   1125,   1920,   1080,       192,    41,       44,      5  14835,    6000, }, // 16 - 1920 x 1080p@60            
    {VFMT_CEA_17_720x576P_50HZ,           ProgrVNegHNeg,    864,    625,    720,    576,       132,    44,       64,      5   2700,    5000, }, // 17 - 720  x 576p@50             
    {VFMT_CEA_19_1280x720P_50HZ,          ProgrVPosHPos,   1980,    750,   1280,    720,       260,    25,       40,      5   7425,    5000, }, // 19 - 1280 x 720p@50Hz           
    {VFMT_CEA_20_1920x1080I_50HZ,         InterVPosHPos,   2640,   1125,   1920,   1080,       192,    20,       44,      5   7425,    5000, }, // 20 - 1920 x 1080i@50Hz          
    {VFMT_CEA_21_720x576I_50HZ,           InterVNegHNeg,   1728,    625,   1440,    576,       264,    22,      126,      3   2700,    5000, }, // 21 - 1440 x 576i@50             
    {VFMT_CEA_31_1920x1080P_50HZ,         ProgrVPosHPos,   2640,   1125,   1920,   1080,       192,    41,       44,      5  14850,    5000, }, // 31 - 1920 x 1080p@50            
    {VFMT_CEA_32_1920x1080P_24HZ,         ProgrVPosHPos,   2750,   1125,   1920,   1080,       192,    41,       44,      5   7417,    2400, }, // 32 - 1920 x 1080p@24            
    {VFMT_CEA_33_1920x1080P_25HZ,         ProgrVPosHPos,   2640,   1125,   1920,   1080,       192,    41,       44,      5   7425,    2500, }, // 33 - 1920 x 1080p@25            
    {VFMT_CEA_34_1920x1080P_30HZ,         ProgrVPosHPos,   2200,   1125,   1920,   1080,       192,    41,       44,      5   7417,    3000, }, // 34 - 1920 x 1080p@30            
    {VFMT_CEA_39_1920x1080I_50HZ,         InterVNegHNeg,   2304,   1250,   1920,   1080,       352,    62,       168,     5   7200,    5000, }, // 39 - 1920 x 1080i@50
																							                                 0.01MHz  0.01Hz
																							
	FPGA程序时序						
	.H_ActiveSize	(1920 ), // Hor Addr Time / Hor Blank Start  		Active_H
	.H_FrameSize	(2200 ), // Hor Total Time                   		Total_H 
	.H_SyncStart	(2008 ), // Hor Sync Start                   		Total_H - Offset_H
	.H_SyncEnd		(2052 ), // Hor Sync Start + Hor Sync Time   		Total_H - Offset_H + Sync_H
	.V_ActiveSize	(1080 ), // Ver Addr Time / Ver Blank Start  		Active_V
	.V_FrameSize	(1125 ), // Ver Sync Time                    		Total_V 
	.V_SyncStart	(1084 ), // Ver Blank Start                  		Total_V - Offset_V
	.V_SyncEnd 		(1089 )  // Ver Blank Start +Ver Sync Time 	 		Total_V - Offset_V + Sync_V