quartus ii 中的系统任务

最新推荐文章于 2021-06-22 23:33:05 发布

sangi

最新推荐文章于 2021-06-22 23:33:05 发布

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分类专栏： verilog quartusII应用文章标签： system 任务 action file

本文链接：https://blog.csdn.net/sangi/article/details/5402498

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初步学习了一些verilog的语法中的系统任务，想在quartus ii中做些试验，结果有如下警报：

Warning (10175): Verilog HDL warning at test1.v(10): ignoring unsupported system task

跟踪错误进去看了一下。有解释如下：

CAUSE: In a Verilog Design File (.v) at the specified location, you enabled the specified system task. However, Quartus II Integrated Synthesis does not support the system task and, therefore, ignored it. In most cases, system tasks are only relevant for simulation and can be safely ignored without changing the functionality of your design. Please consult Quartus II Help for system tasks with synthesis support.

ACTION:

No action is required. To avoid receiving this message in the future, remove the task enable from your design or hide it from synthesis using translate_on/translate_off directives.

从帮助信息可以看出，Quartus集成的综合器是不支持系统任务的，所以quartus会忽略系统任务。在大多数情况下，系统任务仅用于仿真。如果要处理此警告，可以再程序中将系统任务注释掉。或者通过translate on/translate_off指令将其隐藏；