翻译 Designing Stable Compensation Networks for Single Phase Voltage Mode Buck Regulators

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Assumptions 假设

This Technical Brief makes the following assumptions:
1. The power supply designer has already designed the power stage of the single phase buck converter. The last step to the design is the compensation network.
2. The designer has at least a basic understanding of control systems theory.
3. The designer has a basic understanding of Bode plots
 

本技术概要作出以下假设：

1.电源设计者已经设计了单相buck变换器的功率级。最后一步是补偿网络的设计。

2.设计者至少对控制系统理论有基本的了解。

3.设计师对波特图有基本的了解

 

Introduction

Synchronous and non-synchronous buck regulators have three basic blocks that contribute to the closed loop system.These blocks consist of the modulator, the output filter, and the compensation network which closes the loop and stabilizes the system.
建立闭环系统，同步和非同步降压buck有三个基本模块。这些模块由调制器、输出滤波器和补偿网络组成，补偿网络用于闭环和稳定系统。

Modulator

The modulator is shown in Figure 2. The input to the modulator is the output of the error amplifier, which is used to compare the output to the reference.

调制器如图2所示。调制器的输入是误差放大器的输出，误差放大器的输出是将输出反馈与参考进行比较得出的。

The output of the modulator is the PHASE node. The gain of the modulator is simply the input voltage to the regulator, VIN, divided by the peak-to-peak voltage of the oscillator, ∆VOSC, or:
调制器的输出是PHASE 节点。调制器的增益仅为调节器的输入电压VIN除以载波的峰峰∆VOSC，用公式表示如下：

The peak to peak voltage of the oscillator can be obtained from the data sheet for the controller IC.

载波的峰峰值可从控制器IC的手册中获得。

Output Filter

The output filter consists of the output inductor and all of the output capacitance. It is important to include the DC resistance (DCR) of the output inductor and the total Equivalent Series Resistance (ESR) of the output capacitor bank. The input to the output filter is the PHASE node and the output is the regulator output. Figure 3 shows the equivalent circuit of the output filter and its transfer function.
输出滤波器由输出电感和所有的输出电容组成。重要的是需要包括输出电感的直流电阻（DCR）和输出电容组的总等效串联电阻（ESR）。输出滤波器的输入是PHASE 节点，输出是调节器输出。图3显示了输出滤波器的等效电路及其传递函数。

The transfer function for the output filter shows the well known double pole of an LC filter. It is important to note that the ESR of the capacitor bank and the DCR of the inductor both influence the damping of this resonant circuit. It is also important to notice the single zero that is a function of the output capacitance and its ESR

输出滤波器的传递函数显示了众所周知的LC滤波器的双极点。值得注意的是，电容器组的ESR和电感的DCR都会影响谐振电路的阻尼。注意单零点也很重要，它是输出电容及其ESR的关系。

Open Loop System

Figure 4 illustrates the open loop system and presents the  transfer function.

图4说明了开环系统并给出了传递函数。

Figure 5 shows the asymptotic Bode plot of the open loop system gain.

图5显示了开环系统增益的渐近Bode图。

Figure 5 represents a generic open loop system. Specific systems will have different double pole and ESR zero frequencies. For systems with very low DCR and ESR parameters, the phase will experience a very sharp slope downward at the double pole while the gain will have a rather high peak at the double pole. Systems that have such resonant output filters will be more difficult to compensate since the phase will need an extra boost to provide the necessary phase margin for stability. Systems such as this will typically need a Type III compensation, which will be discussed later in this brief

图5表示一个通用的开环系统。特定系统将具有不同的双极点和ESR零点频率。对于DCR和ESR参数非常低的系统，相位在双极点处会经历一个非常急剧的向下倾斜，而增益在双极处会有一个相当高的峰值。具有这种谐振输出滤波器的系统将更难补偿，因为相位将需要额外的升高以提供稳定所需的相位裕度。像这样的系统通常需要III型补偿，这将在本简介后面讨论。

Closing The Loop - The Compensation Network

Closing the control loop allows the regulator to adjust to load perturbations or changes in the input voltage which may adversely affect the output. Proper compensation of the system will allow for a predictable bandwidth with unconditional stability. In most cases, a Type II or Type III compensation network will properly compensate the system. The ideal Bode plot for the compensated system would be a gain that rolls off at a slope of -20dB/decade, crossing 0db at the desired bandwidth and a phase margin greater than 45o for all frequencies below the 0dB crossing. For synchronous and non-synchronous buck converters, the bandwidth should be between 20 to 30% of the switching frequency.
闭环控制回路允许调节器调整负载扰动或输入电压的变化，不调节对输出产生不利影响。系统的适当补偿到可预测带宽使得系统无条件稳定的。在大多数情况下，II型或III型网络用来适当补偿系统。补偿后的系统的理想Bode图的的增益曲线应该是一个以-20dB/decade 的斜率衰减，在所需带宽下穿过0db，并且对于低于0db交叉的所有频率，相位裕度大于45度。对于同步和非同步buck变换器，带宽大概应在开关频率的20%到30%之间。

Type II Compensation

 

Figure 6 shows a generic Type II compensation, its transfer function and asymptotic Bode plot. The Type II network helps to shape the profile of the gain with respect to frequency and also gives a 90o boost to the phase. This boost is necessary to counteract the effects of the resonant output filter at the double pole.

图6是一个通用的II型补偿，以及它的传递函数和渐近Bode图。II型网络根据频率修正相应的增益曲线，还可以将相位提高90度。为了抵消双极点谐振输出滤波器的影响，这种提高相位是必要的。

If the output voltage of the regulator is not the reference voltage then a voltage programming resistor will be connected between the inverting input to the error amplifier and ground. This resistor is used to offset the output voltage to a level higher than the reference. This resistor, if present, has no effect on the compensation and can be ignored.

如果调节后的输出电压不是参考电压，则分压电阻器将连接在误差放大器的反相输入和地之间。该电阻器用于将输出电压偏移到高于基准电压的水平。该电阻器（如果存在）对补偿没有影响，可以忽略。（小信号建模，不影响稳态）

 

Figure 7 shows the closed loop system with a Type II compensation network and presents the closed loop transferfunction.

图7显示了带有II型补偿网络的闭环系统，并给出了闭环传递函数。

The following guidelines will help calculate the poles and zeroes, and from those the component values, for a Type IInetwork.

以下步骤将有助于计算II型网络的极点和零点，并由此计算元器件值。
1. Choose a value for R1, usually between 2k and 5kΩ.

1为R1选择一个值，通常在2k和5kΩ之间。
2. Pick a gain (R2/R1) that will shift the Open Loop Gain up to give the desired bandwidth. This will allow the 0dB crossover to occur in the frequency range where the Type II network has a flat gain. The following equation will calculate an R2 that will accomplish this given the system parameters and a chosen R1.

2选择一个增益（R2/R1），它将使开环增益向上移动，以提供所需的带宽。这将允许0dB穿越发生在II型网络具有平坦增益的频率范围内。以下等式将计算一个R2，该R2将在给定系统参数和选定R1的情况下实现这一点。

3. Calculate C2 by placing the zero a decade below the output filter double pole frequency:

3。通过将零置于输出滤波器双极点频率以下十倍来计算C2：

4. Calculate C1 by placing the second pole at half the switching frequency:

4通过将第二极点置于开关频率的一半来计算C1：

Figure 8 shows the asymptotic Bode gain plot and the actual gain and phase equations for the Type II compensated system. It is recommended that the actual gain and phase plots be generated through the use of commercially available analytical software.Some examples of software that can be used are Mathcad, Maple, and Excel. The asymptotic plot of the gain and phase does not portray all the necessary information that is needed to determine stability and bandwidth.

图8显示了II型补偿系统的渐近波特图的增益图以及实际增益和相位方程。建议通过使用商用软件计算实际增益图和相位图。一些可以使用的软件示例有Mathcad、Maple和Excel。增益和相位的渐近图并没有完全的描绘出，只画出了和稳定性和带宽所需的所有必要信息。

 

The compensation gain must be compared to the open loop gain of the error amplifier. The compensation gain should not exceed the error amplifier open loop gain because this is the limiting factor of the compensation. Once the gain and phase plots are generated and analyzed, the system may need to be changed somewhat in order adjust the bandwidth or phase margin. Adjust the location of the pole and or zero to modify the profile of the plots.
If the phase margin proves too difficult to correct, then a Type III system may be needed.

补偿器增益必须与误差放大器的开环增益进行比较。补偿增益不应超过误差放大器开环增益，因为这是补偿的限制因素。开始设计和分析增益和相位图，可能需要对系统进行一些更改，以便调整带宽或相位裕度。调整极点和或零点的位置以修改波特图的波形。
如果相位裕度难以校正，则可能需要III型系统。

Type III Compensation

Figure 9 shows a generic Type III compensation, its transfer function and asymptotic Bode plot. The Type III network shapes the profile of the gain with respect to frequency in a similar fashion to the Type II network. The Type III network, however, utilizes two zeroes to give a phase boost of 180o.This boost is necessary to counteract the effects of an under damped resonance of the output filter at the double pole.

图9是一个通用的III型补偿，以及它的传递函数和渐近Bode图。III型补偿网络与II型网络类似的方式 ，用频率 来修正增益曲线。然而，III型网络利用两个零来提供180度的相位提升。这种提升对于抵消双极点输出滤波器的欠阻尼谐振的影响是必要的。

Figure 10 shows the closed loop system with a Type III compensation network and presents the closed loop transfer function.

图10显示了带有III型补偿网络的闭环系统，并给出了闭环传递函数。

The guidelines for positioning the poles and zeroes and for calculating the component values are similar to the guidelines for the Type II network.

放置极点和零点的位置，以及计算补偿元件的值与II型网络的方法类似。
1. Choose a value for R1, usually between 2k and 5kΩ.

1  为R1选择一个值，通常在2k到5k之间。
2. Pick a gain (R2/R1) that will shift the Open Loop Gain up to give the desired bandwidth. This will allow the 0dB crossover to occur in the frequency range where the Type III network has its second flat gain. The following equation will calculate an R2 that will accomplish this given the system parameters and a chosen R1.

2选择一个增益（R2/R1），它将使开环增益向上移动，以提供所需的带宽。这将允许0dB穿越发生在III型网络具有第二个平坦增益的频率范围内。以下等式将计算一个R2，该R2将在给定系统参数和选定R1的情况下实现这一点。

3. Calculate C2 by placing the zero at 50% of the output filter double pole frequency:

3.通过将零点置于输出滤波器双极点频率的50%来计算C2：

4. Calculate C1 by placing the first pole at the ESR zero frequency

4通过在ESR零点频率处放置第一个极点来计算C1

:

5. Set the second pole at half the switching frequency and also set the second zero at the output filter double pole. This combination will yield the following component

5将第二极点设置为开关频率的一半，并在输出滤波器双极点处设置第二零点。据此使用以下俩个方程。

Figure 11 shows the asymptotic Bode gain plot for the Type III compensated system and the gain and phase equations for the compensated system. As with the Type II compensation network, it is recommended that the actual gain and phase plots be generated through the use of a commercially available analytical software package that has the capability to plot.

图11显示了III型补偿系统的渐近波特图的增益图以及补偿系统的增益和相位方程。与II型补偿网络一样，建议使用具有绘图功能的商用分析软件包生成实际增益和相位图。

The compensation gain must be compared to the open loop gain of the error amplifier. The compensation gain should not exceed the error amplifier open loop gain because this is the limiting factor of the compensation. Once the gain and phase plots are generated the system may need to be changed after it is analyzed. Adjust the poles and/or zeroes in order to shape the gain profile and insure that the phase margin is greater than 45o.

补偿增益必须与误差放大器的开环增益进行比较。补偿增益不应超过误差放大器开环增益，因为这是补偿的限制因素。一旦生成了增益和相位图，在分析之后可能需要对系统进行更改。调整极点和零点，以形成期望的增益图，并确保相位裕度大于45度。

Example

The following example will illustrate the entire process of compensation design for a synchronous buck converter. Converter Parameters

下面的例子将说明同步buck变换器补偿器设计的整个过程。变换器参数如下

Input Voltage:    VIN      5V
Output Voltage: VOUT 3.3V
Controller IC:    IC       ISL6520A
Osc. Voltage:   ∆VOSC 1.5V
Switching Frequency: fSW   300kHz
Total Output Capacitance: COUT 990µF
Total ESR:           ESR 5mΩ
Output Inductance: LOUT 900nH
Inductor DCR:        DCR 3mΩ
Desired Bandwidth: DBW 90kHz

First, a Type II compensation network will be attempted. The low ESR of the output capacitance and the low DCR of the output inductor may make the implementation of a Type II network difficult.
The guidelines given for designing a Type II network were followed in order to calculate the following component values:

首先，将尝试使用II型补偿网络。输出电容的低ESR和输出电感的低DCR可能使II型网络的实现变得困难。
 计算以下元器件值，遵循了II型网络设计指南：
R1 = 4.12kΩ (chosen as the feedback component)
R2 = 125.8kΩ
C1 = 8.464pF
C2 = 2.373nF
These calculated values need to be replaced by standard resistor values before the gain and phase plots can be plotted and examined.

在绘制和检查增益和相位图之前，需要用标准电阻值替换这些计算值。
R1 = 4.12kΩ
R2 = 124kΩ
C1 = 8.2pF
C2 = 2.2nF
Upon analysis of the bode plots in Figure 12, it can be seen that the system does not meet the stability criteria previously set. The bode plot for the gain is acceptable. The gain rolls off at 20dB/decade with a perturbation at the resonant point of the LC filter. After the perturbation, the gain again begins to roll off about 20dB/decade until it crosses 0dB right around 90kHz. The phase plot shows the problem with this Type II system. The low ESR and DCR values create a very sharp slope downward at the double pole of the LC filter.

对图12中的波特曲线图进行分析后，可以看出系统不符合先前设定的稳定性标准。增益的波特图是可以接受的。增益以20dB\decade的速度衰减，同时在LC滤波器的谐振点处产生扰动。在扰动之后，增益再次开始下降约20dB\decade，直到它在90kHz左右越过0dB。相位图显示了II型系统的问题。低ESR和DCR值在LC滤波器的双极处产生了一个非常尖锐的向下倾斜。

The dive in the phase is so sharp that the 90o phase boost of the Type II network does not compensate the phase enough to have sufficient phase margin. At approximately 6kHz, the phase margin goes below 45o and never recovers. There is nothing more that the Type II system can do to improve the phase. The Phase of the compensation is at it’s peak when the phase of the filter is at it’s minimum.

相位的下降是如此剧烈，以至于II型网络的90o相位提升不能补偿相位，从而产生足够的相位裕度。在大约6kHz时，相位裕度低于45度，并且永远不会恢复。2型补偿对改善这一阶段无能为力。当滤波器的相位处于最小值时，补偿的相位处于峰值。
Another problem with the Type II compensation network in this example is that the compensation gain intersects and then exceeds the gain of the error amplifier open loop gain.

本例中II型补偿网络的另一个问题是补偿增益与误差放大器开环增益相交，然后超过其增益。
As the open loop gain of the error amplifier is the limiting factor to the compensation gain, the actual gain and phase is affected by the limit and will not exceed it. Due to these issues, a Type III network will need to be implemented to compensate for the phase properly. The guidelines for the Type III network were then followed to produce the following component values:

由于误差放大器的开环增益是补偿增益的限制因素，实际增益和相位受此限制的影响，不会超过此限制。由于这些问题，需要实施第三类网络补偿，以适当补偿该阶段。然后遵循III型网络的准则，得出以下分量值：
R1 = 4.12kΩ (chosen as the feedback component)
R2 = 20.863kΩ
R3 = 151.85Ω
C1 = 0.2587nF
C2 = 2.861nF
C3 = 6.987nF
Again, these calculated values need to be replaced by standard resistor values before the gain and phase plots can be plotted and examined.

同样，在绘制和检查增益和相位图之前，需要用标准电阻值替换这些计算值。
R1 = 4.12kΩ
R2 = 20.5kΩ
R3 = 150Ω
C1 = 0.22nF
C2 = 2.7nF
C3 = 6.8nF
The gain plot of the Type III compensated system in Figure 13 looks very good. The gain rolls off at -20dB/decade from low frequency all the way to the 0dB crossover with a small perturbation from the LC filter double pole resonant point. The phase plot shows a system that is unconditionally stable.

图13中III型补偿系统的增益图看起来很好。增益以-20dB\/decade的速度从低频一直滚到0dB交叉点，LC滤波器的双极谐振点有一个小扰动。相位图显示了一个无条件稳定的系统。