RK3568 UBOOT启动阶段分析

关键信息：

1、UBOOT默认加载存储的启动顺序为SD卡、MMC2、MMC1；

2、UBOOT设备树来自于resource.img中，并非UBOOT本身的设备树。

 

从开始启动到UBOOT启动后打断，输出的log信息。

▒DDR V1.18 f366f69a7d typ 23/07/17-15:48:58
In
LP4/4x derate en, other dram:2x trefi
ddrconfig:7
LP4 MR14:0x4d
LPDDR4, 324MHz
BW=32 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=4096MB
tdqss: cs0 dqs0: -24ps, dqs1: -120ps, dqs2: -72ps, dqs3: -168ps,
tdqss: cs1 dqs0: -24ps, dqs1: -96ps, dqs2: -72ps, dqs3: -168ps,

change to: 324MHz
clk skew:0x63

change to: 528MHz
clk skew:0x58

change to: 780MHz
clk skew:0x58

change to: 1560MHz(final freq)
PHY drv:clk:38,ca:38,DQ:30,odt:60
vrefinner:16%, vrefout:29%
dram drv:40,odt:80
vref_ca:00000068
clk skew:0x2b
cs 0:
the read training result:
DQS0:0x34, DQS1:0x34, DQS2:0x34, DQS3:0x31,
min  : 0xe  0xe 0x12  0xf  0x2  0x7  0x8  0x2 , 0xb  0x8  0x3  0x1 0x10  0xb  0xe  0x7 ,
      0x10 0x10  0xc  0x9  0x4  0x2  0x2  0x3 , 0xb  0x7  0x8  0x2 0x11 0x10  0xc  0xf ,
mid  :0x29 0x2b 0x2e 0x2c 0x1e 0x24 0x25 0x1f ,0x26 0x24 0x1d 0x1d 0x2c 0x27 0x28 0x23 ,
      0x2b 0x2b 0x27 0x25 0x1f 0x1c 0x1d 0x1f ,0x27 0x23 0x23 0x1e 0x2d 0x2c 0x27 0x2b ,
max  :0x45 0x48 0x4b 0x49 0x3b 0x41 0x42 0x3d ,0x41 0x41 0x37 0x3a 0x48 0x43 0x43 0x3f ,
      0x47 0x47 0x42 0x41 0x3b 0x37 0x38 0x3b ,0x43 0x40 0x3f 0x3a 0x49 0x48 0x43 0x48 ,
range:0x37 0x3a 0x39 0x3a 0x39 0x3a 0x3a 0x3b ,0x36 0x39 0x34 0x39 0x38 0x38 0x35 0x38 ,
      0x37 0x37 0x36 0x38 0x37 0x35 0x36 0x38 ,0x38 0x39 0x37 0x38 0x38 0x38 0x37 0x39 ,
the write training result:
DQS0:0x27, DQS1:0x14, DQS2:0x1d, DQS3:0xa,
min  :0x64 0x66 0x6b 0x68 0x5a 0x5c 0x62 0x5f 0x60 ,0x4e 0x4e 0x47 0x4a 0x56 0x54 0x52 0x50 0x4c ,
      0x5e 0x5f 0x58 0x5a 0x53 0x50 0x4f 0x54 0x56 ,0x47 0x47 0x46 0x3f 0x4f 0x50 0x4b 0x50 0x43 ,
mid  :0x80 0x81 0x86 0x82 0x72 0x74 0x7b 0x78 0x79 ,0x6a 0x68 0x60 0x63 0x6e 0x6b 0x6a 0x69 0x66 ,
      0x79 0x79 0x72 0x73 0x6b 0x66 0x68 0x6d 0x6f ,0x62 0x60 0x5e 0x59 0x66 0x6a 0x63 0x69 0x5c ,
max  :0x9d 0x9c 0xa1 0x9d 0x8a 0x8d 0x95 0x92 0x92 ,0x86 0x83 0x7a 0x7d 0x87 0x82 0x83 0x83 0x80 ,
      0x95 0x94 0x8c 0x8d 0x83 0x7c 0x82 0x87 0x89 ,0x7d 0x79 0x77 0x73 0x7d 0x84 0x7b 0x83 0x75 ,
range:0x39 0x36 0x36 0x35 0x30 0x31 0x33 0x33 0x32 ,0x38 0x35 0x33 0x33 0x31 0x2e 0x31 0x33 0x34 ,
      0x37 0x35 0x34 0x33 0x30 0x2c 0x33 0x33 0x33 ,0x36 0x32 0x31 0x34 0x2e 0x34 0x30 0x33 0x32 ,
cs 1:
the read training result:
DQS0:0x34, DQS1:0x33, DQS2:0x36, DQS3:0x31,
min  : 0xe  0xe 0x12  0xe  0x2  0x6  0x9  0x3 , 0xb  0x7  0x3  0x1  0xf  0xa  0xc  0x7 ,
      0x10 0x10  0xb  0x9  0x5  0x2  0x4  0x3 , 0xc  0x8  0xa  0x2 0x12 0x11  0xc  0xf ,
mid  :0x29 0x2a 0x2e 0x2b 0x1d 0x23 0x25 0x1f ,0x24 0x23 0x1c 0x1c 0x2a 0x25 0x27 0x22 ,
      0x2c 0x2b 0x26 0x25 0x20 0x1c 0x1f 0x1f ,0x27 0x24 0x24 0x1d 0x2d 0x2c 0x27 0x2b ,
max  :0x44 0x46 0x4a 0x48 0x39 0x41 0x41 0x3c ,0x3e 0x3f 0x35 0x37 0x46 0x41 0x42 0x3e ,
      0x49 0x47 0x42 0x42 0x3c 0x37 0x3a 0x3b ,0x43 0x40 0x3f 0x39 0x49 0x47 0x43 0x48 ,
range:0x36 0x38 0x38 0x3a 0x37 0x3b 0x38 0x39 ,0x33 0x38 0x32 0x36 0x37 0x37 0x36 0x37 ,
      0x39 0x37 0x37 0x39 0x37 0x35 0x36 0x38 ,0x37 0x38 0x35 0x37 0x37 0x36 0x37 0x39 ,
the write training result:
DQS0:0x27, DQS1:0x14, DQS2:0x1d, DQS3:0xa,
min  :0x62 0x66 0x6a 0x67 0x58 0x5b 0x5f 0x5e 0x5f ,0x52 0x52 0x4b 0x4c 0x5a 0x56 0x56 0x54 0x50 ,
      0x60 0x60 0x5a 0x5b 0x55 0x52 0x52 0x56 0x57 ,0x49 0x49 0x48 0x44 0x50 0x52 0x4c 0x52 0x44 ,
mid  :0x7f 0x81 0x85 0x82 0x71 0x74 0x79 0x77 0x78 ,0x6d 0x6c 0x64 0x66 0x72 0x6e 0x6e 0x6d 0x69 ,
      0x7b 0x7a 0x73 0x75 0x6d 0x69 0x6a 0x6f 0x71 ,0x65 0x61 0x5f 0x5b 0x68 0x6c 0x64 0x6c 0x5d ,
max  :0x9c 0x9d 0xa0 0x9d 0x8a 0x8d 0x94 0x91 0x92 ,0x89 0x86 0x7d 0x80 0x8a 0x87 0x87 0x87 0x83 ,
      0x97 0x95 0x8d 0x8f 0x85 0x81 0x83 0x88 0x8b ,0x81 0x79 0x77 0x73 0x81 0x86 0x7d 0x86 0x77 ,
range:0x3a 0x37 0x36 0x36 0x32 0x32 0x35 0x33 0x33 ,0x37 0x34 0x32 0x34 0x30 0x31 0x31 0x33 0x33 ,
      0x37 0x35 0x33 0x34 0x30 0x2f 0x31 0x32 0x34 ,0x38 0x30 0x2f 0x2f 0x31 0x34 0x31 0x34 0x33 ,
CA Training result:
cs:0 min  :0x46 0x41 0x3b 0x32 0x3b 0x2f 0x42 ,0x44 0x3a 0x3b 0x31 0x38 0x30 0x42 ,
cs:0 mid  :0x82 0x82 0x75 0x71 0x75 0x6e 0x6d ,0x81 0x7c 0x75 0x70 0x73 0x70 0x6d ,
cs:0 max  :0xbe 0xc3 0xaf 0xb1 0xb0 0xae 0x98 ,0xbe 0xbe 0xb0 0xb0 0xae 0xb1 0x98 ,
cs:0 range:0x78 0x82 0x74 0x7f 0x75 0x7f 0x56 ,0x7a 0x84 0x75 0x7f 0x76 0x81 0x56 ,
cs:1 min  :0x49 0x43 0x3e 0x36 0x3f 0x32 0x41 ,0x49 0x40 0x40 0x35 0x3e 0x35 0x44 ,
cs:1 mid  :0x85 0x84 0x79 0x76 0x79 0x72 0x6e ,0x84 0x81 0x7a 0x76 0x78 0x74 0x71 ,
cs:1 max  :0xc1 0xc6 0xb5 0xb7 0xb3 0xb3 0x9c ,0xbf 0xc2 0xb5 0xb7 0xb3 0xb3 0x9f ,
cs:1 range:0x78 0x83 0x77 0x81 0x74 0x81 0x5b ,0x76 0x82 0x75 0x82 0x75 0x7e 0x5b ,
out
U-Boot SPL board init
U-Boot SPL 2017.09 (Jul 08 2024 - 11:09:50)
unknown raw ID 0 0 0
unrecognized JEDEC id bytes: 00, 00, 00
Trying to boot from MMC2
Card did not respond to voltage select!
mmc_init: -95, time 12
spl: mmc init failed with error: -95
Trying to boot from MMC1
SPL: A/B-slot: _a, successful: 0, tries-remain: 7
Trying fit image at 0x4000 sector
## Verified-boot: 0
## Checking atf-1 0x00040000 ... sha256(0d5225a4ab...) + OK
## Checking uboot 0x00a00000 ... sha256(e9716ef3cb...) + OK
## Checking fdt 0x00b41028 ... sha256(22d1b6f0e4...) + OK
## Checking atf-2 0xfdcc1000 ... sha256(3e94d16e6a...) + OK
## Checking atf-3 0x0006b000 ... sha256(fde0ef262b...) + OK
## Checking atf-4 0xfdcce000 ... sha256(c9eb312bf2...) + OK
## Checking atf-5 0xfdcd0000 ... sha256(befba422b8...) + OK
## Checking atf-6 0x00069000 ... sha256(6ede7a3b44...) + OK
## Checking optee 0x08400000 ... sha256(4fcbcd3870...) + OK
Jumping to U-Boot(0x00a00000) via ARM Trusted Firmware(0x00040000)
Total: 201.487/681.35 ms

INFO:    Preloader serial: 2
NOTICE:  BL31: v2.3():v2.3-607-gbf602aff1:cl
NOTICE:  BL31: Built : 10:16:03, Jun  5 2023
INFO:    GICv3 without legacy support detected.
INFO:    ARM GICv3 driver initialized in EL3
INFO:    pmu v1 is valid 220114
INFO:    dfs DDR fsp_param[0].freq_mhz= 1560MHz
INFO:    dfs DDR fsp_param[1].freq_mhz= 324MHz
INFO:    dfs DDR fsp_param[2].freq_mhz= 528MHz
INFO:    dfs DDR fsp_param[3].freq_mhz= 780MHz
INFO:    Using opteed sec cpu_context!
INFO:    boot cpu mask: 0
INFO:    BL31: Initializing runtime services
INFO:    BL31: Initializing BL32
I/TC:
I/TC: OP-TEE version: 3.13.0-723-gdcfdd61d0 #hisping.lin (gcc version 10.2.1 20201103 (GNU Toolchain for the A-profile Architecture 10.2-2020.11 (arm-10.16))) #2 Wed Jun  7 09:43:57 CST 2023 aarch64
I/TC: Primary CPU initializing
I/TC: Primary CPU switching to normal world boot
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0xa00000
INFO:    SPSR = 0x3c9


U-Boot 2017.09 (Aug 23 2024 - 10:08:06 +0800)

Model: JS Fronter Electric CO. RK3568
MPIDR: 0x81000000
PreSerial: 2, raw, 0xfe660000
DRAM:  4 GiB
Sysmem: init
Relocation Offset: ed21e000
Relocation fdt: eb9f8d08 - eb9fece0
CR: M/C/I
DM: v1
dwmmc@fe2b0000: 1, dwmmc@fe2c0000: 2, sdhci@fe310000: 0
Bootdev(atags): mmc 0
MMC0: HS200, 200Mhz
PartType: EFI
boot mode: None
RESC: 'boot', blk@0x0001397d
resource1: sha256+
FIT: no signed, no conf required
DTB: rk-kernel.dtb
HASH(c): OK
I2c0 speed: 100000Hz
vsel-gpios- not found! Error: -2
vdd_cpu 1000000 uV
PMIC:  RK8090 (on=0x10, off=0x00)
vdd_logic init 900000 uV
vdd_gpu init 900000 uV
vdd_npu init 900000 uV
io-domain: OK
INFO:    ddr dmc_fsp already initialized in loader.
*** Warning - bad CRC, using default environment

Could not find baseparameter partition
Model: RK3568 Board
MPIDR: 0x81000000
Rockchip UBOOT DRM driver version: v1.0.1
VOP have 1 active VP
vp0 have layer nr:6[0 2 4 1 3 5 ], primary plane: 4
vp1 have layer nr:0[], primary plane: 0
vp2 have layer nr:0[], primary plane: 0
xfer: num: 2, addr: 0x50
xfer: num: 2, addr: 0x50
Could not find baseparameter partition
hdmi@fe0a0000:  detailed mode clock 148500 kHz, flags[5]
    H: 1920 2008 2052 2200
    V: 1080 1084 1089 1125
bus_format: 2025
VOP update mode to: 1920x1080p60, type: HDMI0 for VP0
VP0 set crtc_clock to 148000KHz
VOP VP0 enable Smart0[655x80->655x80@632x500] fmt[1] addr[0xedf27000]
CEA mode used vic=16
final pixclk = 148000000 tmdsclk = 148000000
PHY powered down in 0 iterations
PHY PLL locked 1 iterations
PHY powered down in 0 iterations
PHY PLL locked 1 iterations
CLK: (sync kernel. arm: enter 816000 KHz, init 816000 KHz, kernel 0N/A)
  apll 1104000 KHz
  dpll 780000 KHz
  gpll 1188000 KHz
  cpll 1000000 KHz
  npll 1200000 KHz
  vpll 24000 KHz
  hpll 148000 KHz
  ppll 200000 KHz
  armclk 1104000 KHz
  aclk_bus 150000 KHz
  pclk_bus 100000 KHz
  aclk_top_high 500000 KHz
  aclk_top_low 400000 KHz
  hclk_top 150000 KHz
  pclk_top 100000 KHz
  aclk_perimid 300000 KHz
  hclk_perimid 150000 KHz
  pclk_pmu 100000 KHz
Net:   eth0: ethernet@fe2a0000
Hit key to stop autoboot('CTRL+C'):  0
=> <INTERRUPT>
=> <INTERRUPT>
=>

 

在U-Boot SPL board init中可获取到的信息：

U-Boot SPL board init
U-Boot SPL 2017.09 (Jul 08 2024 - 11:09:50)
unknown raw ID 0 0 0
unrecognized JEDEC id bytes: 00, 00, 00
Trying to boot from MMC2
Card did not respond to voltage select!
mmc_init: -95, time 12
spl: mmc init failed with error: -95
Trying to boot from MMC1
SPL: A/B-slot: _a, successful: 0, tries-remain: 7
Trying fit image at 0x4000 sector

1、可以看到，分别从SD卡、MMC2、MMC1中尝试启动，SD卡、MMC2均失败，最后在MMC1处成功，故可以看出UBOOT默认加载存储的启动顺序为SD卡、MMC2、MMC1；

2、加载fit镜像位置为MMC1的0x4000块位置，即为uboot分区位置，在parameter中设置。

 

在U-Boot启动阶段可获取到的信息：

U-Boot 2017.09 (Aug 23 2024 - 10:08:06 +0800)

Model: JS Fronter Electric CO. RK3568
MPIDR: 0x81000000
PreSerial: 2, raw, 0xfe660000
DRAM:  4 GiB
Sysmem: init
Relocation Offset: ed21e000
Relocation fdt: eb9f8d08 - eb9fece0
CR: M/C/I
DM: v1
dwmmc@fe2b0000: 1, dwmmc@fe2c0000: 2, sdhci@fe310000: 0
Bootdev(atags): mmc 0
MMC0: HS200, 200Mhz
PartType: EFI
boot mode: None
RESC: 'boot', blk@0x0001397d
resource1: sha256+
FIT: no signed, no conf required
DTB: rk-kernel.dtb
HASH(c): OK
I2c0 speed: 100000Hz
vsel-gpios- not found! Error: -2
vdd_cpu 1000000 uV
PMIC:  RK8090 (on=0x10, off=0x00)
vdd_logic init 900000 uV
vdd_gpu init 900000 uV
vdd_npu init 900000 uV
io-domain: OK
INFO:    ddr dmc_fsp already initialized in loader.
*** Warning - bad CRC, using default environment

1、该阶段将对设备树进行位置重定向，位置为eb9f8d08 - eb9fece0。

2、此处打印出DTB: rk-kernel.dtb，该设备树来自于resource.img中，并非UBOOT本身的设备树，RK3568中，UBOOT的设备树并没有起作用。rk-kernel.dtb的加载操作可看一下resource_img.c（u-boot/arch/arm/mach-rockchip/路径下），其中定义了

#define DEFAULT_DTB_FILE        "rk-kernel.dtb"

在启动过程中，会在resource.img中查找rk-kernel.dtb，并使用该设备树来启动。

此前我一直纳闷明明UBOOT设备树中没有配置网口，结果还能检测并使用网口，而当我只烧录到uboot.img镜像，后续boot.img不烧录时，就会发现网口无法使用了，原因就来自于此。