The Arm architecture is a weakly ordered memory architecture that permits the observation and completion of memory accesses in a different order from the program order. The following sections of this chapter provide the complete definition of the ARMv8 memory model, this introduction is not intended to contradict the definition found in those sections. In general, the basic principles of the ARMv8 memory model are: | armv是属于弱内存模型,有如下一些原则:
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• To provide a memory model that has similar weaknesses to those found in the memory models used by high-level programming languages such as C or Java. For example, by permitting independent memory accesses to be reordered as seen by other observers. | 对同一个observer,没有地址依赖的指令可以乱序执行,对于不同的observer,不同的地址被观察到的顺序可以乱序。 |
• To avoid the requirement for multi-copy atomicity in the majority of memory types. | 对主要的内存模型(这里指的是shareable and not device类型)不是multi-copy内存模型,因此程序要避免对multi-copy模型的依赖 |
• The provision of instructions and memory barriers to compensate for the lack of multi-copy atomicity in the cases where it would be needed. | 提供内存屏障指令(DMB等)和其他指令,来提供对multi-copy的支持 |
The use of address, data, and control dependencies in the creation of order so as to avoid having excessive numbers of barriers or other explicit instructions in common situations where some order is required by the programmer or the compiler. | armv8提供三种类型的依赖(地址依赖,数据依赖和控制依赖),armv8会保证这些指令的顺序关系,并保证对其他observer的可见性的顺序,程序可以从分利用这些依赖来提供顺序要求。 |
B2.1.1 Address space
Address calculations are performed using 64-bit registers. However, supervisory software can configure the top eight address bits for use as a tag, as described in Address tagging in AArch64 state on page D5-2386. If this is done, address bits[63:56]: • Are not considered when determining whether the address is valid. • Are never propagated to the program counter. | 地址可以配置为64bit或者56bit两种模式 |
B2.1.2 Memory type overview
Normal | This is generally used for bulk memory operations, both read/write and read-only operations. | 我们通常说的内存属于normal,读写没有side-effects |
Device | The Arm architecture forbids Speculative reads of any type of Device memory. This means Device memory types are suitable attributes for read-sensitive Locations. | 一般的外设寄存器都属于此类,有side-effects,不能进行speculative操作。 |