[Alsa Document]7, clocking.txt

本篇来介绍音频时钟clock，如果没有了心跳或者心跳出了问题，音频质量就会大打折扣。
基于4.9.123版本内核 Documentation/sound/alsa/soc/DAI.txt

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The Digital Audio Interface is usually driven by a Bit Clock (often referred to
as BCLK). This clock is used to drive the digital audio data across the link
between the codec and CPU.
数字音频接口通常由位时钟（通常称为BCLK）驱动。 该时钟用于通过编解码器和CPU之间的
链路驱动数字音频数据。

The DAI also has a frame clock to signal the start of each audio frame. This
clock is sometimes referred to as LRC (left right clock) or FRAME. This clock
runs at exactly the sample rate (LRC = Rate).
DAI还有一个帧时钟，用于指示每个音频帧的开始。 该时钟有时称为LRC（左右时钟）或FRAME。 此时钟以采样率（LRC =速率）运行。

Bit Clock can be generated as follows:-
可以按如下方式生成Bit Clock： - 

BCLK = MCLK / x

 or

BCLK = LRC * x

 or

BCLK = LRC * Channels * Word Size

This relationship depends on the codec or SoC CPU in particular. In general
it is best to configure BCLK to the lowest possible speed (depending on your
rate, number of channels and word size) to save on power.
这种关系尤其取决于编解码器或SoC CPU。 通常，最好将BCLK配置为尽可能低的速度（取决
于您的速率，通道数和字大小）以节省功耗。

It is also desirable to use the codec (if possible) to drive (or master) the
audio clocks as it usually gives more accurate sample rates than the CPU.
还希望使用编解码器（如果可能的话）来驱动（或掌握）音频时钟，因为它通常提供比CPU更
准确的采样率。

结合原理图或许更加清晰：