ddr2的上电顺序_DSP上电顺序到底应怎样？

外围3.3V、1.8V和内核1.2V，上电、掉电顺序多数不是应该：上电由内向外1.2->1.8->3.3V;掉电3.3->1.8->1.2吗？可是TIDM648的Datashe里，顺序好像正好相反。难道是我英语不好意思看反了...

外围3.3V、1.8V和内核1.2V，上电、掉电顺序多数不是应该：

上电由内向外1.2->1.8->3.3V;掉电3.3->1.8->1.2吗？

可是TI DM648的Datashe里，顺序好像正好相反。难道是我英语不好意思看反了吗？

请大家帮忙看一下：

Power-Supply Sequencing

The device includes 1.2-V core supply (CVDD, CVDDESS, CVDD1, AVDDA, DVDDD, AVDDT), and two I/O

supplies—3.3-V (DVDD33) and 1.8-V (DVDD18, AVDLL1, AVDLL2, AVDDR). To ensure proper device operation,

a specific power-up sequence must be followed. Some TI power-supply devices include features that

facilitate power sequencing — for example, Auto-Track and Slow-Start/Enable features.

Following is a summary of the power sequencing requirements:

• The power ramp order must be 3.3-V (DVDD33) before 1.8-V (DVDD18, AVDLL1, AVDLL2, AVDDR), and 1.8-

V (DVDD18, AVDLL1, AVDLL2, AVDDR) before 1.2-V core supply (CVDD, CVDDESS, CVDD1, AVDDA, DVDDD,

AVDDT) —meaning during power up, the voltage at the 1.8-V rail should never exceed the voltage at

the 3.3-V rail. Similarly, the voltage at the 1.2-V rail should never exceed the voltage at the DVDDR2 rail.

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