ddr3配置 dsp6678_TMS320C6678 如何去配置DDR3的模式寄存器（MRS）

c6678中是可以去配置MRS的，详情请参考DDR3 user guide，配置程序可以参考下置顶帖中DDR3例程

2.4.1 Mode Register Set (MRS or EMRS)

DDR3 SDRAM contains mode and extended mode registers that configure the DDR3 memory for

operation. These registers control burst type, burst length, CAS latency, DLL enable/disable, etc.

The DDR3 memory controller programs the mode and extended mode registers of the DDR3 memory by

issuing MRS and EMRS commands. MRS and EMRS commands can be issued during DDR3 initialization

as well as during normal operation as long as the external SDRAM is in idle state. When the MRS or

EMRS command is executed, the value on DDRBA [1:0] selects the mode register to be written and the

data on DDRA [12:0] is loaded into the register. DDRA [15:13] and DDRBA [2] are reserved and are

programmed to 0 during MRS (or EMRS).

Each mode register allows programming of different sets