The serial clock (DCLK) generated by the Cyclone III device controls the
entire configuration cycle and provides timing for the serial interface.
Cyclone III devices use an 40-MHz internal oscillator to generate DCLK.
There is some variation in the internal oscillator frequency because of
the process, voltage, and temperature conditions in Cyclone III devices.
The internal oscillator is designed such that its maximum frequency is
guaranteed to meet EPCS device specifications.
【 在 Pinder (cyclone) 的大作中提到: 】
: 有一个问题我一直不理解,哪位给解释一下。
: 看cycloneIII手册时它有快速配置和正常配置模式
: 好像速度是40M和20M吧。也没有要求外部给这个时钟,
: ...................