GD407替代ST207-硬件I2C+DMA收发

GD407替代ST207,硬件I2C+dma收发;
目前存在问题:1、发送数据时,从机收不到地址。

采用硬件I2C加dma的收发,有利于程序的实时性,不会出现明显的延迟。

/****************************************I2C配置 dma配置 中间层数据配置******************************************************/
I2C配置程序如下:
_BSPStatus_TypeDef BSP_Driver_Init(void)
{
	uint16_t ListLenth;
	GPIO_InitTypeDef GPIO_InitStructure;
	
	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_CRC, ENABLE);
	RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);
	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
	
	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6 | GPIO_Pin_7;			
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
	GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; //推挽输出
	GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
	GPIO_Init(GPIOB, &GPIO_InitStructure);

	GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;			
	GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
	GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
	GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; //推挽输出
	GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
	GPIO_Init(GPIOB, &GPIO_InitStructure);

	GPIO_WriteBit(GPIOB,GPIO_Pin_8,Bit_RESET);
	
	GPIO_PinAFConfig(GPIOB,GPIO_PinSource6,GPIO_AF_I2C1);
	GPIO_PinAFConfig(GPIOB,GPIO_PinSource7,GPIO_AF_I2C1);	

	//I2C中间层-数据处理部分
	BSP_I2CCOMM_Init();

	//dma配置
	BSP_LIST_GetLenth(DMA_CONFIG_LIST_Index,&ListLenth);
	BSP_DMA_Init(&DMAConfigList[0],ListLenth);
	
	BSP_LIST_GetLenth(I2C_CONFIG_LIST_Index,&ListLenth);

	//---I2C soft reset must put its before init . do not change the three sentence sq-------------------// 	
	I2C_SoftwareResetCmd(I2C1,ENABLE);			
	I2C_SoftwareResetCmd(I2C1,DISABLE); 	
	BSP_I2C_Init(&I2CConfigList[0],ListLenth);		
	//--------------------------------------------//
	I2C1->CR1 |= 0x80;
	return BSP_OK;
}

#define EEPROM_ADDR 0xA0
#define RTC_ADDR 0xA2

#define I2C_COMM_TX_BUFF_SIZE		192
#define I2C_COMM_TX_STORAGE_SIZE	(256*2)
#define I2C_COMM_TX_QUEUE_DEPTH		(30*1)

#define I2C_COMM_RX_BUFF_SIZE		192
#define I2C_COMM_RX_STORAGE_SIZE	(256*2)
#define I2C_COMM_RX_QUEUE_DEPTH		(5*1)

#define I2C_COMM_TXRX_FORCE_IDEL	100

uint8_t			I2C_COMM_TX_BUFF[I2C_COMM_TX_BUFF_SIZE];//I2C 底层将发送数据拿到待发送缓冲区
uint8_t			I2C_COMM_TX_STORAGE[I2C_COMM_TX_STORAGE_SIZE];//存入循环队列的发送数组
_QueueBlock_Def	I2C_COMM_TX_QUEUE[I2C_COMM_TX_QUEUE_DEPTH];

uint8_t			I2C_COMM_RX_BUFF[I2C_COMM_RX_BUFF_SIZE];
uint8_t			I2C_COMM_RX_STORAGE[I2C_COMM_RX_STORAGE_SIZE];
_QueueBlock_Def	I2C_COMM_RX_QUEUE[I2C_COMM_RX_QUEUE_DEPTH];

_QueueHandle_Def I2C_COMM_TxData_Handle;
_QueueHandle_Def I2C_COMM_RxData_Handle;

_I2CBufferStatus_Def TXBuffST;
_I2CBufferStatus_Def RXBuffST;
static _QueueHandle_Def *pHandleTX;
static _QueueHandle_Def *pHandleRX;
_I2CCommunicateBuffer_Def *pDataBuffTx;
_I2CCommunicateBuffer_Def *pDataBuffRx;

#pragma section=".dma_config_list"
__root const _DMAConfigurationList_Def DMAConfigList[] @".dma_config_list" = 
{
	{DMA1_Stream5,	{	DMA_Channel_1,//dma外设到内存-接收数据
						(uint32_t)&(I2C1->DR),
						(uint32_t)&I2C_COMM_RX_BUFF[0],
						DMA_DIR_PeripheralToMemory,
						I2C_COMM_RX_BUFF_SIZE,
						DMA_PeripheralInc_Disable,
						DMA_MemoryInc_Enable,
						DMA_PeripheralDataSize_Byte,
						DMA_MemoryDataSize_Byte,
						DMA_Mode_Normal,
						DMA_Priority_VeryHigh,
						DMA_FIFOMode_Disable,
						DMA_FIFOThreshold_Full,
						DMA_MemoryBurst_Single,
						DMA_PeripheralBurst_Single},
						ENABLE,	DISABLE,	DISABLE,	DISABLE,	DISABLE},
	{DMA1_Stream6,	{	DMA_Channel_1,//dma内存到外设-发送数据
						(uint32_t)&(I2C1->DR),
						(uint32_t)&I2C_COMM_TX_BUFF[0],
						DMA_DIR_MemoryToPeripheral,
						I2C_COMM_TX_BUFF_SIZE,
						DMA_PeripheralInc_Disable,
						DMA_MemoryInc_Enable,
						DMA_PeripheralDataSize_Byte,
						DMA_MemoryDataSize_Byte,
						DMA_Mode_Normal,
						DMA_Priority_VeryHigh,
						DMA_FIFOMode_Disable,
						DMA_FIFOThreshold_Full,
						DMA_MemoryBurst_Single,
						DMA_PeripheralBurst_Single},
						ENABLE,	DISABLE,	DISABLE,	DISABLE,	DISABLE},
};
#pragma section = ".dma_config_head"
__root const _ConfigListLenth_Def DMA_CONFIG_LIST_HEAD @ ".dma_config_head" =
{
	"$-DMALEN-$",
	__section_begin	(".dma_config_list"),
	__section_end	(".dma_config_list"),
	__section_size	(".dma_config_list"),
				LEN_ARRAY(DMAConfigList),
	"$-LENEND-$",
};

#pragma section = ".i2c_config_head"
__root const _ConfigListLenth_Def I2C_CONFIG_LIST_HEAD @ ".i2c_config_head" =
{
	"$-I2CLEN-$",
	__section_begin	(".i2c_config_list"),
	__section_end	(".i2c_config_list"),
	__section_size	(".i2c_config_list"),
				LEN_ARRAY(I2CConfigList),
	"$-LENEND-$",
};
typedef struct
{
	char		ListTitle[16];
	void*		ListStartAddr;
	void*		ListEndAddr;
	uint32_t	ListSize;
	uint32_t	ListLenth;
	char		ListTail[16];
}_ConfigListLenth_Def;

#pragma section=".i2c_config_list"
__root const _I2CConfigurationList_Def I2CConfigList[] @".i2c_config_list" = 
{
	{I2C1,	{400000,	
			I2C_Mode_I2C,	
			I2C_DutyCycle_2,	
			0,	
			I2C_Ack_Enable,	
			I2C_AcknowledgedAddress_7bit},	
			DISABLE,	DISABLE,	DISABLE,	DISABLE},
};

_BSPStatus_TypeDef BSP_LIST_GetLenth(_ListLenthIndex_Def ListIndex,uint16_t* pLenth)
{	
	uint32_t tempListLen;
	_BSPStatus_TypeDef ret = BSP_OK;
	
	switch(ListIndex)
	{
		case DMA_CONFIG_LIST_Index:
			tempListLen = DMA_CONFIG_LIST_HEAD.ListLenth;
			break;
		case I2C_CONFIG_LIST_Index:
			tempListLen = I2C_CONFIG_LIST_HEAD.ListLenth;
			break;
			
		default:
			tempListLen = 0;
			ret = BSP_ERROR;
			break;
	}
	*pLenth = tempListLen;

	return ret;
}

_BSPStatus_TypeDef BSP_I2CCOMM_Init(void)
{
	_QueueParameter_Def newQueueParm;
	
	newQueueParm.StorageSize	= I2C_COMM_TX_STORAGE_SIZE;
	newQueueParm.QueueDepth		= I2C_COMM_TX_QUEUE_DEPTH;
	newQueueParm.pStoragePool	= &I2C_COMM_TX_STORAGE[0];
	newQueueParm.pSrcDataBuff	= NULL;
	newQueueParm.pDstDataBuff	= &I2C_COMM_TX_BUFF[0];
	newQueueParm.pQueueBlock	= &I2C_COMM_TX_QUEUE[0];
	
	BSP_QUEUE_Register(&I2C_COMM_TxData_Handle,&newQueueParm);

	newQueueParm.StorageSize	= I2C_COMM_RX_STORAGE_SIZE;
	newQueueParm.QueueDepth		= I2C_COMM_RX_QUEUE_DEPTH;
	newQueueParm.pStoragePool	= &I2C_COMM_RX_STORAGE[0];
	newQueueParm.pSrcDataBuff	= &I2C_COMM_RX_BUFF[0];
	newQueueParm.pDstDataBuff	= NULL;
	newQueueParm.pQueueBlock	= &I2C_COMM_RX_QUEUE[0];
	
	BSP_QUEUE_Register(&I2C_COMM_RxData_Handle,&newQueueParm);
	
	pHandleTX = &I2C_COMM_TxData_Handle;
	pHandleRX = &I2C_COMM_RxData_Handle;
	pDataBuffTx = (_I2CCommunicateBuffer_Def*)(pHandleTX->Parameter.pDstDataBuff);
	pDataBuffRx = (_I2CCommunicateBuffer_Def*)(pHandleRX->Parameter.pSrcDataBuff);

	TXBuffST = I2C_BUFF_IDLE;
	RXBuffST = I2C_BUFF_IDLE;

	Dev_Addr = 0;

	TransBusyFlag = FALSE;
	g_flag_I2CFixEnable = FALSE;
	ForceIdleDelay = 0;
	
	return BSP_OK;
}
static const _I2CConfigurationList_Def* pConfig_List_Table = NULL;
static uint16_t Config_List_Lenth = NULL;
static const _DMAConfigurationList_Def* pConfig_List_Table = NULL;
static uint16_t Config_List_Lenth = NULL;


_BSPStatus_TypeDef BSP_DMA_Init(const _DMAConfigurationList_Def* pList,uint16_t ListLen)
{
	BSP_DMA_Set_List(pList,ListLen);
	BSP_DMA_Config(ENABLE);
	
	return BSP_OK;
}
_BSPStatus_TypeDef BSP_DMA_Set_List(const _DMAConfigurationList_Def* pList,uint16_t ListLen)
{
	pConfig_List_Table = pList;
	Config_List_Lenth = ListLen;

	return BSP_OK;
}

_BSPStatus_TypeDef BSP_DMA_Config(FunctionalState Ctrl)
{
	int16_t i;

	for(i = 0;i < Config_List_Lenth;i++)
	{
		BSP_DMA_IT_Set(&pConfig_List_Table[i],Ctrl);
		BSP_DMA_Set(&pConfig_List_Table[i],Ctrl);
	}

	return BSP_OK;
}

_BSPStatus_TypeDef BSP_DMA_IT_Set(const _DMAConfigurationList_Def* pList,FunctionalState Ctrl)
{
	_DMAConfigurationList_Def DMAConfig = *pList;
	uint16_t DMAITEnableData = 0;
	uint16_t DMAITDisableData = 0;

	if(ENABLE == Ctrl)
	{
		if(ENABLE == DMAConfig.DMA_TC_Ctrl)
		{
			DMAITEnableData |= DMA_IT_TC;
		}
		if(ENABLE == DMAConfig.DMA_HT_Ctrl)
		{
			DMAITEnableData |= DMA_IT_HT;
		}
		if(ENABLE == DMAConfig.DMA_TE_Ctrl)
		{
			DMAITEnableData |= DMA_IT_TE;
		}
		if(ENABLE == DMAConfig.DMA_DME_Ctrl)
		{
			DMAITEnableData |= DMA_IT_DME;
		}
		if(ENABLE == DMAConfig.DMA_FE_Ctrl)
		{
			DMAITEnableData |= DMA_IT_FE;
		}
		DMAITDisableData |= ((DMA_IT_TC | DMA_IT_HT | DMA_IT_TE | DMA_IT_DME | DMA_IT_FE) \
							& (~DMAITEnableData));
	}
	else
	{
		DMAITDisableData |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE | DMA_IT_DME | DMA_IT_FE);
	}
	
	DMA_ITConfig(DMAConfig.DMA_Stream,DMAITDisableData,DISABLE);
	DMA_ITConfig(DMAConfig.DMA_Stream,DMAITEnableData,ENABLE);

	return BSP_OK;
}

_BSPStatus_TypeDef BSP_DMA_Set(const _DMAConfigurationList_Def* pList,FunctionalState Ctrl)
{
	_DMAConfigurationList_Def DMAConfig = *pList;
	DMA_InitTypeDef DMA_InitStructure;

	DMA_StructInit(&DMA_InitStructure);

	if(ENABLE == Ctrl)
	{
		DMA_InitStructure.DMA_Channel				= DMAConfig.DMA_Type.DMA_Channel;
		DMA_InitStructure.DMA_PeripheralBaseAddr	= DMAConfig.DMA_Type.DMA_PeripheralBaseAddr;
		DMA_InitStructure.DMA_Memory0BaseAddr		= DMAConfig.DMA_Type.DMA_Memory0BaseAddr;
		DMA_InitStructure.DMA_DIR					= DMAConfig.DMA_Type.DMA_DIR;
		DMA_InitStructure.DMA_BufferSize			= DMAConfig.DMA_Type.DMA_BufferSize;
		DMA_InitStructure.DMA_PeripheralInc			= DMAConfig.DMA_Type.DMA_PeripheralInc;
		DMA_InitStructure.DMA_MemoryInc				= DMAConfig.DMA_Type.DMA_MemoryInc;
		DMA_InitStructure.DMA_PeripheralDataSize	= DMAConfig.DMA_Type.DMA_PeripheralDataSize;
		DMA_InitStructure.DMA_MemoryDataSize		= DMAConfig.DMA_Type.DMA_MemoryDataSize;
		DMA_InitStructure.DMA_Mode					= DMAConfig.DMA_Type.DMA_Mode;
		DMA_InitStructure.DMA_Priority				= DMAConfig.DMA_Type.DMA_Priority;
		DMA_InitStructure.DMA_FIFOMode				= DMAConfig.DMA_Type.DMA_FIFOMode;
		DMA_InitStructure.DMA_FIFOThreshold			= DMAConfig.DMA_Type.DMA_FIFOThreshold;
		DMA_InitStructure.DMA_MemoryBurst			= DMAConfig.DMA_Type.DMA_MemoryBurst;
		DMA_InitStructure.DMA_PeripheralBurst		= DMAConfig.DMA_Type.DMA_PeripheralBurst;
	}
	else
	{
		DMA_Cmd(DMAConfig.DMA_Stream,DISABLE);
	}
	
	DMA_Init(DMAConfig.DMA_Stream,&DMA_InitStructure);
	
	return BSP_OK;
}

_BSPStatus_TypeDef BSP_I2C_Init(const _I2CConfigurationList_Def* pList,uint16_t ListLen)
{
	BSP_I2C_Set_List(pList,ListLen);
	BSP_I2C_Config(ENABLE);
	
	return BSP_OK;
}

_BSPStatus_TypeDef BSP_I2C_Set_List(const _I2CConfigurationList_Def* pList,uint16_t ListLen)
{
	pConfig_List_Table = pList;
	Config_List_Lenth = ListLen;

	return BSP_OK;
}


_BSPStatus_TypeDef BSP_I2C_Config(FunctionalState Ctrl)
{
	int16_t i;

	for(i = 0;i < Config_List_Lenth;i++)
	{
		BSP_I2C_DMA_Set(&pConfig_List_Table[i],Ctrl);
		BSP_I2C_IT_Set(&pConfig_List_Table[i],Ctrl);
		BSP_I2C_Set(&pConfig_List_Table[i],Ctrl);
	}

	return BSP_OK;
}

_BSPStatus_TypeDef BSP_I2C_DMA_Set(const _I2CConfigurationList_Def* pList,FunctionalState Ctrl)
{
	_I2CConfigurationList_Def I2CConfig = *pList;
	
	if(DISABLE == Ctrl)
	{
		I2CConfig.I2C_DMA_Ctrl = DISABLE;
	}

	I2C_DMACmd(I2CConfig.I2C_Port,I2CConfig.I2C_DMA_Ctrl);

	return BSP_OK;
}

_BSPStatus_TypeDef BSP_I2C_IT_Set(const _I2CConfigurationList_Def* pList,FunctionalState Ctrl)
{
	_I2CConfigurationList_Def I2CConfig = *pList;
	uint16_t I2CITEnableData = 0;
	uint16_t I2CITDisableData = 0;

	if(ENABLE == Ctrl)
	{
		if(ENABLE == I2CConfig.I2C_Buf_Ctrl)
		{
			I2CITEnableData |= I2C_IT_BUF;
		}
		if(ENABLE == I2CConfig.I2C_Evt_Ctrl)
		{
			I2CITEnableData |= I2C_IT_EVT;
		}
		if(ENABLE == I2CConfig.I2C_Err_Ctrl)
		{
			I2CITEnableData |= I2C_IT_ERR;
		}
		I2CITDisableData |= ((I2C_IT_BUF | I2C_IT_EVT | I2C_IT_ERR) & (~I2CITEnableData));
	}
	else
	{
		I2CITDisableData |= (I2C_IT_BUF | I2C_IT_EVT | I2C_IT_ERR);
	}
	
	I2C_ITConfig(I2CConfig.I2C_Port,I2CITDisableData,DISABLE);
	I2C_ITConfig(I2CConfig.I2C_Port,I2CITEnableData,ENABLE);

	return BSP_OK;
}

_BSPStatus_TypeDef BSP_I2C_Set(const _I2CConfigurationList_Def* pList,FunctionalState Ctrl)
{
	_I2CConfigurationList_Def I2CConfig = *pList;
	I2C_InitTypeDef I2C_InitStructure;

	I2C_StructInit(&I2C_InitStructure);

	if(ENABLE == Ctrl)
	{
		I2C_InitStructure.I2C_ClockSpeed			= I2CConfig.I2C_Type.I2C_ClockSpeed;
		I2C_InitStructure.I2C_Mode					= I2CConfig.I2C_Type.I2C_Mode;
		I2C_InitStructure.I2C_DutyCycle				= I2CConfig.I2C_Type.I2C_DutyCycle;
		I2C_InitStructure.I2C_OwnAddress1			= I2CConfig.I2C_Type.I2C_OwnAddress1;
		I2C_InitStructure.I2C_Ack					= I2CConfig.I2C_Type.I2C_Ack;
		I2C_InitStructure.I2C_AcknowledgedAddress	= I2CConfig.I2C_Type.I2C_AcknowledgedAddress;
	}
	else
	{
		I2C_Cmd(I2CConfig.I2C_Port,DISABLE);
	}
	
	I2C_Init(I2CConfig.I2C_Port,&I2C_InitStructure);
	
	return BSP_OK;
}

/****************************************底层调用驱动收发接口***********************************************/
_BSPStatus_TypeDef BSP_I2CCOMM_MainProc(void)
{
	static uint16_t delay = 0;
	
	_BSPStatus_TypeDef ret = BSP_ERROR;
	
	ret = BSP_I2CCOMM_BuffProc();
	
	if(1 == g_st_TimerFlag.b1ms)
	{
		//BSP_I2CCOMM_ExDataProc();
		delay++;
		if(delay >= 20)//10)
		{
			delay = 0;
			BSP_I2CCOMM_ExDataProc();	
		}
		BSP_I2CCOMM_ForceIdle();
	}
}
static _BSPStatus_TypeDef BSP_I2CCOMM_BuffProc(void)
{
	_BSPStatus_TypeDef ret = BSP_ERROR;

	if((I2C_BUFF_IDLE == TXBuffST) && (I2C_BUFF_IDLE == RXBuffST))//yxj-收发都处于空闲时,再去取数据
	{
		if(BSP_OK == pHandleTX->CallbackDequeue(pHandleTX))//yxj-是否存在待发送的数据,有,取出
		{
			TXBuffST = I2C_BUFF_CONFIG;
			TransBusyFlag = TRUE;
		}
	}
	
	if((I2C_BUFF_FINISH == TXBuffST) && (I2C_BUFF_IDLE == RXBuffST))//yxj-写数据完成或读数据完成后:清空待发送缓冲区,并将发送标志,置空
	{
		memset(pDataBuffTx,0,sizeof(_I2CCommunicateBuffer_Def));
		TXBuffST = I2C_BUFF_IDLE;

	}
	
	if(I2C_BUFF_FINISH == RXBuffST)//yxj-读数据时,将读到的数据存储缓冲区后,修改问题
	{
		if(BSP_OK == pHandleRX->CallbackEnqueue(pHandleRX))
		{                      			
			memset(pDataBuffRx,0,sizeof(_I2CCommunicateBuffer_Def));
			RXBuffST = I2C_BUFF_IDLE;
		}
	}
	ret = BSP_OK;
}
_BSPStatus_TypeDef BSP_I2CCOMM_ExDataProc(void)
{
	_BSPStatus_TypeDef ret = BSP_OK;
	uint8_t ret1 = 0u;
	
	if(SET == I2C_GetFlagStatus(I2Cx,I2C_FLAG_BUSY))
	{
		ret = BSP_BUSY;
	}

	if((BSP_OK == ret)
	&& (I2C_BUFF_CONFIG == TXBuffST))
	{	
		I2Cx->CR1 = 0x0000;
		
		BSP_I2CCOMM_Config();
		BSP_I2CCOMM_Addr_Config(pDataBuffTx->Cmd);
		BSP_I2CCOMM_Addr_Config(pDataBuffRx->Cmd);
		BSP_I2CCOMM_DMA_Config(pDataBuffTx->Cmd);
		BSP_I2CCOMM_DMA_Config(pDataBuffRx->Cmd);
		BSP_I2CCOMM_I2C_Config();
	}	
}
static _BSPStatus_TypeDef BSP_I2CCOMM_Config(void)
{
	if((I2C_COMM_EEP_RD_CMD == pDataBuffTx->Cmd)
	|| (I2C_COMM_RTC_RD_CMD == pDataBuffTx->Cmd))
	{
		if(I2C_COMM_EEP_RD_CMD == pDataBuffTx->Cmd)//yxj-发送读命令,接收修改为读数据
		{
			pDataBuffRx->Cmd = I2C_COMM_EEP_RD_DAT;
		}
		else if(I2C_COMM_RTC_RD_CMD == pDataBuffTx->Cmd)
		{
			pDataBuffRx->Cmd = I2C_COMM_RTC_RD_DAT;
		}
		pDataBuffRx->Addr	= pDataBuffTx->Addr;
		pDataBuffRx->Lenth	= pDataBuffTx->Data.u16Bits[0];

		pHandleRX->Status.EnDataLenth = pDataBuffTx->Data.u16Bits[0] + 6;
		
		RXBuffST = I2C_BUFF_CONFIG;
		TransBusyFlag = TRUE;
	}

	return BSP_OK;
}
_BSPStatus_TypeDef BSP_I2CCOMM_Addr_Config(_I2CCommunicateType_Def Cmd_Type)
{
	switch(Cmd_Type)
	{
		case I2C_COMM_EEP_RD_CMD:
		case I2C_COMM_EEP_RD_DAT:
		case I2C_COMM_EEP_WR_CMD:
			
			Dev_Addr = EEPROM_ADDR;
			break;
			
		case I2C_COMM_RTC_RD_CMD:
		case I2C_COMM_RTC_RD_DAT:
		case I2C_COMM_RTC_WR_CMD:
			
			Dev_Addr = RTC_ADDR;
			break;

		default:
			break;
	}

	return BSP_OK;
}
_BSPStatus_TypeDef BSP_I2CCOMM_DMA_Config(_I2CCommunicateType_Def Cmd_Type)
{
	switch(Cmd_Type)
	{
		case I2C_COMM_EEP_RD_DAT:
		case I2C_COMM_RTC_RD_DAT:
			
			/* Configure DMA Stream source address */
			DMA_Stream_I2CRx->M0AR = (uint32_t)&pDataBuffRx->Data.u8Bits[0];
			
			/* Configure DMA Stream data length */
			DMA_Stream_I2CRx->NDTR = pDataBuffRx->Lenth;
			
			/* Enable Common interrupts*/
			DMA_Stream_I2CRx->CR |= DMA_IT_TC;
			
			/* Enable the Peripheral */
			DMA_Stream_I2CRx->CR |= (uint32_t)DMA_SxCR_EN;
			
			RXBuffST = I2C_BUFF_INUSE;
			TransBusyFlag = TRUE;

			break;
			
		case I2C_COMM_EEP_WR_CMD:
			
			/* Configure DMA Stream source address */
			DMA_Stream_I2CTx->M0AR = (uint32_t)&pDataBuffTx->Addr;
			
			/* Configure DMA Stream data length */
			DMA_Stream_I2CTx->NDTR = pDataBuffTx->Lenth;
			
			/* Enable Common interrupts*/
			DMA_Stream_I2CTx->CR |= DMA_IT_TC;
			
			/* Enable the Peripheral */
			DMA_Stream_I2CTx->CR |= (uint32_t)DMA_SxCR_EN;
			
			TXBuffST = I2C_BUFF_INUSE;
			TransBusyFlag = TRUE;

			break;

		case I2C_COMM_RTC_WR_CMD:
			
			/* Configure DMA Stream source address */
			DMA_Stream_I2CTx->M0AR = (uint32_t)(&pDataBuffTx->Addr) + 1;
			
			/* Configure DMA Stream data length */
			DMA_Stream_I2CTx->NDTR = pDataBuffTx->Lenth - 1;
			
			/* Enable Common interrupts*/
			DMA_Stream_I2CTx->CR |= DMA_IT_TC;
			
			/* Enable the Peripheral */
			DMA_Stream_I2CTx->CR |= (uint32_t)DMA_SxCR_EN;
			
			TXBuffST = I2C_BUFF_INUSE;
			TransBusyFlag = TRUE;

			break;
			
		case I2C_COMM_EEP_RD_CMD:
			
			pDataBuffRx->Addr	= pDataBuffTx->Addr;
			pDataBuffRx->Lenth	= pDataBuffTx->Data.u16Bits[0];
				
			/* Configure DMA Stream source address */
			DMA_Stream_I2CTx->M0AR = (uint32_t)&pDataBuffTx->Addr;
			
			/* Configure DMA Stream data length */
			DMA_Stream_I2CTx->NDTR = pDataBuffTx->Lenth;
			
			/* Enable Common interrupts*/
			DMA_Stream_I2CTx->CR |= DMA_IT_TC;
			
			/* Enable the Peripheral */
			DMA_Stream_I2CTx->CR |= (uint32_t)DMA_SxCR_EN;
			
			TXBuffST = I2C_BUFF_INUSE;
			TransBusyFlag = TRUE;

			break;
			
		case I2C_COMM_RTC_RD_CMD:
			
			pDataBuffRx->Addr	= pDataBuffTx->Addr;
			pDataBuffRx->Lenth	= pDataBuffTx->Data.u16Bits[0];
				
			/* Configure DMA Stream source address */
			DMA_Stream_I2CTx->M0AR = (uint32_t)(&pDataBuffTx->Addr) + 1;
			
			/* Configure DMA Stream data length */
			DMA_Stream_I2CTx->NDTR = pDataBuffTx->Lenth - 1;
			
			/* Enable Common interrupts*/
			DMA_Stream_I2CTx->CR |= DMA_IT_TC;
			
			/* Enable the Peripheral */
			DMA_Stream_I2CTx->CR |= (uint32_t)DMA_SxCR_EN;
			
			TXBuffST = I2C_BUFF_INUSE;
			TransBusyFlag = TRUE;

			break;

		default:
			break;			
	}
	
	return BSP_OK;
}
_BSPStatus_TypeDef BSP_I2CCOMM_I2C_Config(void)
{
	/* Enable I2C peripheral */
	I2C_Cmd(I2Cx,ENABLE);
	
	/* Disable Pos */
	I2Cx->CR1 &= (~I2C_CR1_POS);	
	
	/* Enable Acknowledge */
	I2C_AcknowledgeConfig(I2Cx,ENABLE);
	
	/* Generate Start */
	I2C_GenerateSTART(I2Cx,ENABLE);
	
	/* Enable EVT interrupt */
	I2C_ITConfig(I2Cx,I2C_IT_EVT,ENABLE);
	
	/* Enable I2C DMA requests */
	I2C_DMACmd(I2Cx,ENABLE);

	return BSP_OK;
}
/********************************************中断接口处理********************************************/
_BSPStatus_TypeDef BSP_I2CCOMM_I2C_EV_Handle(void)
{
	uint16_t SR1ItFlag = I2C_ReadRegister(I2Cx,I2C_Register_SR1);//yxj-传输状态寄存器0
	uint16_t SR2ItFlag = I2C_ReadRegister(I2Cx,I2C_Register_SR2);//yxj-传输状态寄存器1
	uint16_t CR2ItFlag = I2C_ReadRegister(I2Cx,I2C_Register_CR2);//yxj-控制寄存器1
	int i = 0x20f;
	
	if(RESET != (SR1ItFlag & (uint16_t)I2C_FLAG_SB))//yxj-判断主机发送了起始条件
	{
		if(I2C_BUFF_INUSE == TXBuffST)
		{
			I2C_Send7bitAddress(I2Cx,Dev_Addr,I2C_Direction_Transmitter);//yxj-发送设备地址
			while(i --);
		}
		else if(I2C_BUFF_INUSE == RXBuffST)
		{
			I2C_Send7bitAddress(I2Cx,Dev_Addr,I2C_Direction_Receiver);//yxj-读取命令
			
			while(i --);
		}
	}

	if(RESET != (SR1ItFlag & (uint16_t)I2C_FLAG_ADDR))//yxj-判断发送地址位是否被置位
	{
		if(1 == pDataBuffRx->Lenth)//yxj-最后一个数据了,不发送应答信号
		{
			I2C_AcknowledgeConfig(I2Cx,DISABLE);
		}
		/* Enable the Peripheral */
		//DMA_Stream_I2CTx->CR |= (uint32_t)DMA_SxCR_EN;
	}
	
	if((RESET != (SR1ItFlag & (uint16_t)I2C_FLAG_BTF)) && (RESET == (CR2ItFlag & I2C_CR2_DMAEN)))//yxj-字节发送结束,硬件通过发送启动条件,
    {
		if(I2C_BUFF_INUSE == RXBuffST)
		{
			I2C_GenerateSTART(I2Cx,ENABLE);//yxj-重启信号
			I2C_DMACmd(I2Cx,ENABLE);
		}
		else if(I2C_BUFF_IDLE == RXBuffST)
		{
			I2C_GenerateSTOP(I2Cx,ENABLE);
		}
	}

	return BSP_OK;
}

_BSPStatus_TypeDef BSP_I2CCOMM_DMA_RX_Handle(void)
{
	if(SET == DMA_GetITStatus(DMA_Stream_I2CRx,DMA_IT_TCIF5))//yxj-传输完成中断
	{
		DMA_ClearITPendingBit(DMA_Stream_I2CRx,DMA_IT_TCIF5);
		DMA_Cmd(DMA_Stream_I2CRx,DISABLE);
		
		I2C_AcknowledgeConfig(I2Cx,DISABLE);
		I2C_GenerateSTOP(I2Cx,ENABLE);
		I2C_DMALastTransferCmd(I2Cx,ENABLE);
		I2C_DMACmd(I2Cx,DISABLE);
		
		RXBuffST = I2C_BUFF_FINISH;
		TransBusyFlag = TRUE;
	}

	return BSP_OK;
}

_BSPStatus_TypeDef BSP_I2CCOMM_DMA_TX_Handle(void)
{
	if(SET == DMA_GetITStatus(DMA_Stream_I2CTx,DMA_IT_TCIF6))//yxj-获取DMA传输完成的状态
	{
		DMA_ClearITPendingBit(DMA_Stream_I2CTx,DMA_IT_TCIF6);
		DMA_Cmd(DMA_Stream_I2CTx,DISABLE);
		I2C_DMACmd(I2Cx,DISABLE);
		TXBuffST = I2C_BUFF_FINISH;
		TransBusyFlag = TRUE;
	}

	return BSP_OK;
}

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