- 行为建模实现5输入的多数表决器
voter5
`timescale 1ns / 1ps
//
// Company:
// Engineer:
//
// Create Date: 2021/04/07 19:40:02
// Design Name:
// Module Name: voter5
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//
module voter5(
input logic [4:0] I,
output logic pass
);
int num;
always_comb begin
int i;
num=0;
for(i=0;i<5;i=i+1) begin
if(I[i]==1) num=num+1;
else num=num;
end
if(num>2) begin pass=1;end
else begin pass=0; end
end
endmodule
voter5_tb(测试文件)
`timescale 1ns / 1ps
//
// Company:
// Engineer:
//
// Create Date: 2021/04/07 19:41:43
// Design Name:
// Module Name: voter5_tb
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
//
//
module voter5_tb();
logic [4:0] I;
logic pass;
integer i;
voter5 DUT(.I(I),.pass(pass));
initial begin
for(i=0;i<32;i=i+1) begin
I=i;
#20;
end
end
initial begin
$timeformat(-9,0,"ns",5);
$monitor("At time %t: I=%b,pass=%b",$time,I,pass);
end
endmodule
voter5.xdc(约束文件)
set_property -dict {PACKAGE_PIN B9 IOSTANDARD LVCMOS33} [get_ports {I[0]}];
set_property -dict {PACKAGE_PIN D11 IOSTANDARD LVCMOS33} [get_ports {I[1]}];
set_property -dict {PACKAGE_PIN B11 IOSTANDARD LVCMOS33} [get_ports {I[2]}];
set_property -dict {PACKAGE_PIN B12 IOSTANDARD LVCMOS33} [get_ports {I[3]}];
set_property -dict {PACKAGE_PIN A10 IOSTANDARD LVCMOS33} [get_ports {I[4]}];
set_property -dict {PACKAGE_PIN K13 IOSTANDARD LVCMOS33} [get_ports {pass}];
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]