IMX6ULL Uboot移植(附下载链接)

 1、官网下载U-boot,下载链接:

https://github.com/nxp-imx/uboot-imx/archive/refs/heads/lf_v2024.04.zip

  下载完成后,在Ubuntu上进行解压

2、修改U-boot顶层Makefile的目标架构和交叉编译器:

ARCH = arm
CROSS_COMPILE = /opt/gcc-aarch32-10.3-2021.07/bin/arm-none-linux-gnueabihf-

 CROSS_COMPILE路径为自己的交叉编译路径,运行结果:

 

保存后退出。

3、添加自己的开发板板级文件

将 board/freescale/mx6ullevk 文件夹中的内容复制到自己创建的 board/imx6ull/igkboard 文件夹中,然后再进行修改

cd board/
mkdir -p imx6ull/igkboard
cp freescale/mx6ullevk/* imx6ull/igkboard/

运行结果:

3.1、imximage_lpddr2.cfg 和 imximage.cfg

imximage_lpddr2.cfg 和 imximage.cfg 是U-Boot配置文件,它们用于定义如何生成适用于特定硬件的U-Boot映像。

imximage_lpddr2.cfg 文件是专门用于配置低功耗DDR2(LPDDR2)内存的U-Boot映像。它包含了一些参数设置,例如内存大小、速度等级、数据宽度等,以便正确配置U-Boot以使用LPDDR2内存。

imximage.cfg 文件则是通用的U-Boot配置文件,它包含了一些通用的参数设置,可以用于生成适用于多种不同硬件配置的U-Boot映像。这个文件通常会包含一些默认的设置,然后可以根据需要进行修改或扩展。

这里我们只修改imximage.cfg 文件的PLUGIN路径:

3.2、Kconfig

Kconfig文件是一个用于配置和编译Linux内核和U-Boot的配置文件。具体来说,Kconfig文件主要用于配置和编译过程中的选择项,通过这个文件可以实现条件编译,从而决定哪些代码或驱动被包含在最终生成的U-Boot镜像中。文件修改为:

if TARGET_IMX6ULL_IGKBOARD

config SYS_BOARD
        default "igkboard"

config SYS_VENDOR
        default "imx6ull"

config SYS_CONFIG_NAME
        default "igkboard"

config IMX_CONFIG
        default "board/imx6ull/igkboard/imximage.cfg"

config TEXT_BASE
        default 0x87800000
endif

 3.3、MAINTAINERS

MAINTAINERS文件是U-Boot源代码中用于记录开发板支持维护者信息的文件。

IMX6ULL IGKBOARD
M:    lyl <lyl@qq.com>
S:    Maintained
F:    board/imx6ull/igkboard/
F:    include/configs/igkboard.h
F:    configs/igkboard_defconfig

 3.4、Makefile

Makefile是uboot编译过程中必不可少的文件,用于指定编译规则和文件依赖关系。

在uboot的目录结构中,每一个开发板对应的板级文件夹都包含了一个Makefile文件,这个文件的作用是指导编译过程,告诉编译器如何编译源代码以及需要链接哪些对象文件。在板级文件夹中的Makefile通常会定义一些特定的编译规则,这些规则可能包括要编译的文件、编译选项以及生成的目标文件等。

# SPDX-License-Identifier: GPL-2.0+
# (C) Copyright 2016 Freescale Semiconductor, Inc.

obj-y  := igkboard.o
obj-y  += ../../freescale/common/mmc.o

 3.5、igkboard.c

mx6ullevk.c文件是MX6ULLEVK开发板在U-Boot中的核心文件,它包含了开发板初始化、设备树处理、硬件配置、命令实现、引导内核以及其他与开发板密切相关的功能。通过这个文件,U-Boot能够为MX6ULLEVK开发板提供适当的启动和配置支持。

这里我们将mx6ullevk.c文件更名为igkboard.c:

mv mx6ullevk.c igkboard.c

 修改 #include "../common/pfuze.h" 为 #include "../../freescale/common/pfuze.h"

IGKBoard开发板,调用puts函数输出"Board: IGKBoard\n\n"到控制台:

4、igkboard_defconfig配置文件

在U-Boot中,configs文件夹下的mx6ull_14x14_evk_emmc_defconfig文件是一个配置文件,用于定义MX6ULL 14x14开发板(基于NXP i.MX6ULL系列处理器)的默认配置。这个配置文件主要包含了与该开发板相关的硬件设置、驱动选项和功能开关等。这些配置信息有助于U-Boot在启动过程中正确地初始化硬件,并根据需要加载相应的驱动程序和功能模块。

这里我们将configs文件夹下的mx6ull_14x14_evk_emmc_defconfig文件复制为igkboard_defconfig

,主要是添加一些个性化配置,修改对应开发板的 usb 的厂商 id 和设备 id,并且添加 overlay 配置,添加和修改的内容如下所示:

CONFIG_TARGET_IMX6ULL_IGKBOARD=y    表明目标设备是“imx6ull_igkboard”,并且该配置已被启用
CONFIG_DEFAULT_DEVICE_TREE="igkboard"    指定了默认的设备树文件为“igkboard”
CONFIG_IMX_CONFIG="board/imx6ull/igkboard/imximage.cfg"  定义imximage的配置文件路径
CONFIG_SYS_PROMPT="[u-boot@igkboard]# "       定义uboot的命令行提示符
CONFIG_NET_RANDOM_ETHADDR=y                使能生成随机mac地址

CONFIG_USB_GADGET_VENDOR_NUM=0x0525
CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
分别设置了usb gadget模式的供应商id (vendor id) 和产品id (product id)。
这些id用于usb设备枚举过程,允许主机识别连接的usb设备。

CONFIG_OF_LIBFDT_OVERLAY=y                表明支持设备树覆盖(overlay)

5、添加开发板对应的头文件

在 /include/configs/ 文件夹下,添加 igkboard_overlay.h 和 igkboard.h,这两个个文件的功能是用于配置或者裁剪 uboot。igkboard.h 是将 mx6ullevk.h 拷贝过来进行修改的,mx6ullevk.h文件中的CFG_EXTRA_ENV_SETTINGS的作用是提供一种方式来自定义和配置U-Boot运行时的环境变量,允许用户根据具体的开发板或应用场景进行个性化设置。

cp igkboard.h mx6ullevk.h
#ifndef __IGKBOARD_CONFIG_H
#define __IGKBOARD_CONFIG_H


#include "igkboard_overlay.h"


#define CFG_EXTRA_ENV_SETTINGS \
    "console=ttymxc0\0" \
    "upmode=fastboot 0\0" \
    "envconf=config.txt\0" \
    "image=zImage\0" \
    "board=igkboard\0" \
    "fdt_file=igkboard.dtb\0" \
    "fdt_size=0x10000\0" \
    "fdt_addr=0x83000000\0" \
    "dtbo_addr=0x83010000\0" \
    "dtbo_dir=overlays\0" \
    "splashimage=0x8c000000\0" \
    "ipaddr=192.168.2.22\0" \
    "serverip=192.168.2.2\0" \
    "mmcpart=1\0" \
    "mmcargs=setenv bootargs console=${console},${baudrate} root=/dev/mmcblk${mmc_no}p2 rootwait rw net.ifnames=0\0" \
    "loadenvconf=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${envconf};env import -t ${loadaddr} ${filesize}\0" \
    "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
    "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
    "bootos=bootz ${loadaddr} - ${fdt_addr}\0" \
    "mmcboot=mmc dev ${mmcdev};run mmcargs;run loadimage;run loadfdt;run bootos\0" \
    "netboot=tftp $loadaddr $image; tftp $fdt_addr ${fdt_file}; run mmcargs; run bootos\0" \
    "bbl=tftp ${loadaddr} u-boot-${board}.imx && mmc dev ${mmcdev} 1 && mmc write ${loadaddr} 2 0x800\0" \
    "bdtb=tftp $fdt_addr $fdt_file && fatwrite mmc 1:1 $fdt_addr $fdt_file $filesize\0" \
    "bker=tftp $loadaddr $image&& fatwrite mmc 1:1 $loadaddr $image $filesize\0" \
    "bsys=run bdtb && run bker\0"

#ifdef IGKBOARD_DTOVERLAY_SUPPORT
#undef  CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND      MMC_BOOT_WITH_FDT_OVERLAY
#endif

 添加igkboard_overlay.h文件,内容如下,主要添加了一些在 uboot 运行起来后使用 设备树覆盖的指令:

vim igkboard_overlay.h
#ifndef __IGKBOARD_DTOVERLAY_H
#define __IGKBOARD_DTOVERLAY_H

#define IGKBOARD_DTOVERLAY_SUPPORT

#define FDT_APPLY_OVERLAY()          \
    "echo Applying DT overlay => ${dtbo_file}; " \
    "fatload mmc ${mmcdev}:${mmcpart} ${dtbo_addr} ${dtbo_dir}/${dtbo_file}; " \
    "fdt addr ${fdt_addr}; " \
    "fdt resize ${fdt_size}; " \
    "fdt apply ${dtbo_addr}; "

#define CHECK_APPLY_OVERLAY( name )     \
    "if env exists dtoverlay_" name " && test ${dtoverlay_" name "} = 1 -o ${dtoverlay_" name "} = yes ; then " \
        "setenv dtbo_file " name ".dtbo; " \
        FDT_APPLY_OVERLAY() \
    "fi; "

#define CHECK_APPLY_OVERLAYS_IDX( name )     \
    "if env exists dtoverlay_" name "; then " \
        "for i in ${dtoverlay_" name "}; do " \
            "setenv dtbo_file " name "$i.dtbo; " \
            FDT_APPLY_OVERLAY() \
        " done;" \
    "fi; "

#define CHECK_APPLY_OVERLAYS_DTBO( name )     \
    "if env exists dtoverlay_" name "; then " \
        "for f in ${dtoverlay_" name "}; do " \
            "setenv dtbo_file $f.dtbo; " \
            FDT_APPLY_OVERLAY() \
        " done;" \
    "fi; "

#define FDT_ENTRY_DEF_SETTINGS          \
                CHECK_APPLY_OVERLAY("lcd") \
                CHECK_APPLY_OVERLAY("cam") \
                CHECK_APPLY_OVERLAY("w1") \
                CHECK_APPLY_OVERLAY("adc") \
                CHECK_APPLY_OVERLAYS_IDX("i2c") \
                CHECK_APPLY_OVERLAYS_IDX("spi") \
                CHECK_APPLY_OVERLAYS_IDX("uart") \
                CHECK_APPLY_OVERLAYS_IDX("can") \
                CHECK_APPLY_OVERLAYS_IDX("pwm") \
                CHECK_APPLY_OVERLAYS_DTBO("extra") \


#define MMC_BOOT_WITH_FDT_OVERLAY   \
    "mmc dev ${mmcdev};"            \
    "run mmcargs; run loadenvconf;" \
    "run loadimage; run loadfdt; "  \
    FDT_ENTRY_DEF_SETTINGS          \
    "run bootos; "                 \

#endif  /* __IGKBOARD_DTOVERLAY_H */

6、修改Kconfig

修改 /arch/arm/mach-imx/mx6/Kconfig,Kconfig 文件在 U-Boot 中主要用于配置和构建过程,它定义了可以配置的选项,以及如何根据这些选项来编译源代码。

config TARGET_IMX6ULL_IGKBOARD
	bool "IMX6ULL Board(IGKBoard)"
	depends on MX6ULL
	select BOARD_LATE_INIT
	select DM
	select DM_THERMAL
	select IMX_MODULE_FUSE
	select OF_SYSTEM_SETUP
	imply CMD_DM
	
source "board/imx6ull/igkboard/Kconfig"

7、修改适配器驱动

7.1、创建 igkboard.dts 设备树文件

在文件夹 /arch/arm/dts 中,将iimx6ul-14x14-evk.dtsi文件复制为igkboard.dts,主要是为了定制特定开发板的设备树文件,确保内核能够正确识别和配置开发板的具体硬件,如lcd屏幕和网络接口。在 uboot 中把所有扩展的 40pin 管脚初始化为 gpio 模式,这样在之后我们可以用设备树插件 动态改变管脚的工作模式。

/dts-v1/;

#include "imx6ull.dtsi"

/ {
        model = "Board based on i.MX6ULL";
        compatible = "imx6ull,igkboard", "fsl,imx6ull-14x14-evk", "fsl,imx6ull";

        chosen {
                stdout-path = &uart1;
        };

        memory@80000000 {
                device_type = "memory";
                reg = <0x80000000 0x20000000>;
        };

        reg_sd1_vmmc: regulator-sd1-vmmc {
                compatible = "regulator-fixed";
                regulator-name = "VSD_3V3";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
                off-on-delay-us = <20000>;
                enable-active-high;
        };
};

&fec1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet1>;
        phy-mode = "rmii";
        phy-handle = <&ethphy0>;
        phy-reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <50>;
        phy-reset-post-delay = <15>;
        status = "okay";
};

&fec2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_enet2>;
        phy-mode = "rmii";
        phy-handle = <&ethphy1>;
        phy-reset-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
        phy-reset-duration = <50>;
        phy-reset-post-delay = <15>;
        status = "okay";

        mdio {
                #address-cells = <1>;
                #size-cells = <0>;

                ethphy0: ethernet-phy@0 {
                        reg = <0>;
                        micrel,led-mode = <1>;
                        clocks = <&clks IMX6UL_CLK_ENET_REF>;
                        clock-names = "rmii-ref";
                };

                ethphy1: ethernet-phy@1 {
                        reg = <1>;
                        micrel,led-mode = <1>;
                        clocks = <&clks IMX6UL_CLK_ENET2_REF>;
                        clock-names = "rmii-ref";
                };
        };
};

&lcdif {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_lcdif_dat
                     &pinctrl_lcdif_ctrl>;

        display = <&display0>;
        status = "okay";

        display0: display@0 {
                bits-per-pixel = <16>;
                bus-width = <16>;

                display-timings {
                        native-mode = <&timing0>;
                        timing0: timing0 {
                        clock-frequency = <30000000>;
                        hactive = <800>;
                        vactive = <480>;
                        hfront-porch = <40>;
                        hback-porch = <88>;
                        hsync-len = <48>;
                        vback-porch = <32>;
                        vfront-porch = <13>;
                        vsync-len = <3>;

                        hsync-active = <0>;
                        vsync-active = <0>;
                        de-active = <1>;
                        pixelclk-active = <0>;
                        };
                };
        };
};

&snvs_poweroff {
        status = "okay";
};

&uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1>;
        status = "okay";
};

&usbotg1 {
        dr_mode = "otg";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usb_otg1>;
        status = "okay";
};

&usbotg2 {
        dr_mode = "host";
        disable-over-current;
        status = "okay";
};

&usbphy1 {
        fsl,tx-d-cal = <106>;
};

&usbphy2 {
        fsl,tx-d-cal = <106>;
};

&usdhc1 {
        pinctrl-names = "default", "state_100mhz", "state_200mhz";
        pinctrl-0 = <&pinctrl_usdhc1>;
        pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
        pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
        cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
        keep-power-in-suspend;
        wakeup-source;
        vmmc-supply = <&reg_sd1_vmmc>;
        status = "okay";
};

&usdhc2 {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_usdhc2>;
    no-1-8-v;
    broken-cd;
    keep-power-in-suspend;
    wakeup-source;
    status = "okay";
};

&wdog1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_wdog>;
        fsl,ext-reset-output;
};

&iomuxc {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_extgpio>;

        pinctrl_extgpio: extgpiogrp {
                fsl,pins = <
                        MX6UL_PAD_GPIO1_IO03__GPIO1_IO03        0x17059
                        MX6UL_PAD_GPIO1_IO02__GPIO1_IO02        0x17059
                        MX6UL_PAD_UART1_CTS_B__GPIO1_IO18       0x17059
                        MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24     0x17059
                        MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28     0x17059
                        MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29     0x17059
                        MX6UL_PAD_LCD_DATA22__GPIO3_IO27        0x17059
                        MX6UL_PAD_LCD_DATA23__GPIO3_IO28        0x17059
                        MX6UL_PAD_LCD_DATA20__GPIO3_IO25        0x17059
                        MX6UL_PAD_UART3_CTS_B__GPIO1_IO26       0x17059
                        MX6UL_PAD_UART3_RTS_B__GPIO1_IO27       0x17059
                        MX6UL_PAD_UART2_CTS_B__GPIO1_IO22       0x17059
                        MX6UL_PAD_UART2_RTS_B__GPIO1_IO23       0x17059
                        MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01      0x17059
                        MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08      0x17059
                        MX6UL_PAD_UART2_TX_DATA__GPIO1_IO20     0x17059
                        MX6UL_PAD_UART2_RX_DATA__GPIO1_IO21     0x17059
                        MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25     0x17059
                        MX6UL_PAD_LCD_DATA16__GPIO3_IO21        0x17059
                        MX6UL_PAD_LCD_DATA17__GPIO3_IO22        0x17059
                        MX6UL_PAD_LCD_DATA18__GPIO3_IO23        0x17059
                        MX6UL_PAD_LCD_DATA21__GPIO3_IO26        0x17059
                        MX6UL_PAD_LCD_DATA19__GPIO3_IO24        0x17059
                        MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15       0x17059
                        MX6UL_PAD_JTAG_TCK__GPIO1_IO14          0x17059
                        MX6UL_PAD_JTAG_TMS__GPIO1_IO11          0x17059
                        MX6UL_PAD_JTAG_MOD__GPIO1_IO10          0x17059
                        MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09      0x17059
                >;
        };

        pinctrl_enet1: enet1grp {
                fsl,pins = <
                        MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN      0x1b0b0
                        MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER      0x1b0b0
                        MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
                        MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
                        MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN      0x1b0b0
                        MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
                        MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
                        MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1  0x4001b031
                        MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07      0x10B0 
                >;
        };

        pinctrl_enet2: enet2grp {
                fsl,pins = <
                        MX6UL_PAD_GPIO1_IO07__ENET2_MDC         0x1b0b0
                        MX6UL_PAD_GPIO1_IO06__ENET2_MDIO        0x1b0b0
                        MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN      0x1b0b0
                        MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER      0x1b0b0
                        MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
                        MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
                        MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN      0x1b0b0
                        MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
                        MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
                        MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2  0x4001b031
                        MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04      0x10B0
                >;
        };

        pinctrl_lcdif_dat: lcdifdatgrp {
                fsl,pins = <
                        MX6UL_PAD_LCD_DATA00__LCDIF_DATA00  0x79
                        MX6UL_PAD_LCD_DATA01__LCDIF_DATA01  0x79
                        MX6UL_PAD_LCD_DATA02__LCDIF_DATA02  0x79
                        MX6UL_PAD_LCD_DATA03__LCDIF_DATA03  0x79
                        MX6UL_PAD_LCD_DATA04__LCDIF_DATA04  0x79
                        MX6UL_PAD_LCD_DATA05__LCDIF_DATA05  0x79
                        MX6UL_PAD_LCD_DATA06__LCDIF_DATA06  0x79
                        MX6UL_PAD_LCD_DATA07__LCDIF_DATA07  0x79
                        MX6UL_PAD_LCD_DATA08__LCDIF_DATA08  0x79
                        MX6UL_PAD_LCD_DATA09__LCDIF_DATA09  0x79
                        MX6UL_PAD_LCD_DATA10__LCDIF_DATA10  0x79
                        MX6UL_PAD_LCD_DATA11__LCDIF_DATA11  0x79
                        MX6UL_PAD_LCD_DATA12__LCDIF_DATA12  0x79
                        MX6UL_PAD_LCD_DATA13__LCDIF_DATA13  0x79
                        MX6UL_PAD_LCD_DATA14__LCDIF_DATA14  0x79
                        MX6UL_PAD_LCD_DATA15__LCDIF_DATA15  0x79
                >;
        };

        pinctrl_lcdif_ctrl: lcdifctrlgrp {
                fsl,pins = <
                        MX6UL_PAD_LCD_CLK__LCDIF_CLK        0x79
                        MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE  0x79
                        MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC    0x79
                        MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC    0x79
                        /* used for lcd reset */
                        MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09  0x79
                >;
        };

        pinctrl_uart1: uart1grp {
                fsl,pins = <
                        MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
                        MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
                >;
        };

        pinctrl_usb_otg1: usbotg1grp {
                fsl,pins = <
                        MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID    0x17059
                >;
        };

        pinctrl_usdhc1: usdhc1grp {
                fsl,pins = <
                        MX6UL_PAD_SD1_CMD__USDHC1_CMD           0x17059
                        MX6UL_PAD_SD1_CLK__USDHC1_CLK           0x10071
                        MX6UL_PAD_SD1_DATA0__USDHC1_DATA0       0x17059
                        MX6UL_PAD_SD1_DATA1__USDHC1_DATA1       0x17059
                        MX6UL_PAD_SD1_DATA2__USDHC1_DATA2       0x17059
                        MX6UL_PAD_SD1_DATA3__USDHC1_DATA3       0x17059
                        MX6UL_PAD_UART1_RTS_B__GPIO1_IO19       0x17059
                        MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT    0x17059
                        MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x17059
                >;
        };

        pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
                fsl,pins = <
                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170b9
                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100b9
                        MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
                        MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
                        MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
                        MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9

                >;
        };

        pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
                fsl,pins = <
                        MX6UL_PAD_SD1_CMD__USDHC1_CMD     0x170f9
                        MX6UL_PAD_SD1_CLK__USDHC1_CLK     0x100f9
                        MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
                        MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
                        MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
                        MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
                >;
        };

        pinctrl_usdhc2: usdhc2grp {
                fsl,pins = <
                        MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x17059
                        MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
                        MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
                        MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
                        MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
                        MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
                >;
        };

        pinctrl_usdhc2_8bit: usdhc2grp_8bit {
                fsl,pins = <
                        MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x10069
                        MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x17059
                        MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
                        MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
                        MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
                        MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
                        MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
                        MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
                        MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
                        MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
                >;
        };

        pinctrl_usdhc2_8bit_100mhz: usdhc2grp_8bit_100mhz {
                fsl,pins = <
                        MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100b9
                        MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170b9
                        MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170b9
                        MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170b9
                        MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170b9
                        MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170b9
                        MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170b9
                        MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170b9
                        MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170b9
                        MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170b9
                >;
        };

        pinctrl_usdhc2_8bit_200mhz: usdhc2grp_8bit_200mhz {
                fsl,pins = <
                        MX6UL_PAD_NAND_RE_B__USDHC2_CLK     0x100f9
                        MX6UL_PAD_NAND_WE_B__USDHC2_CMD     0x170f9
                        MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9
                        MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9
                        MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9
                        MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9
                        MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9
                        MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9
                        MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9
                        MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9
                >;
        };

        pinctrl_wdog: wdoggrp {
                fsl,pins = <
                        MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY    0x30b0
                >;
        };
};

7.2、修改设备树 Makefile 文件

在设备树文件夹中的 Makefile 最后添加我们开发板设备树的编译支持

dtb-$(CONFIG_MX6ULL) += \
	igkboard.dtb \
	imx6ull-14x14-ddr3-val.dtb \
	imx6ull-14x14-ddr3-val-epdc.dtb \

8、 添加复位代码

在 /drivers/net/phy/phy.c 中添加复位代码,添加 phy_reset(phydev) 即可

int genphy_config_aneg(struct phy_device *phydev)
{
	int result;

	phy_reset(phydev);

	if (phydev->autoneg != AUTONEG_ENABLE)
		return genphy_setup_forced(phydev);

	result = genphy_config_advert(phydev);

	if (result < 0) /* error */
		return result;

	if (result == 0) {
		/*
		 * Advertisment hasn't changed, but maybe aneg was never on to
		 * begin with?  Or maybe phy was isolated?
		 */
		int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);

		if (ctl < 0)
			return ctl;

		if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
			result = 1; /* do restart aneg */
	}

	/*
	 * Only restart aneg if we are advertising something different
	 * than we were before.
	 */
	if (result > 0)
		result = genphy_restart_aneg(phydev);

	return result;
}

9、编译

make distclean
make igkboard_defconfig
make -j8

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