RapidIO的三层标准

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于 2024-10-08 15:04:24 首次发布

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The RapidIO protocol is defined in a 3-layered specification:

Physical: Electrical specifications, PCS(physical coding sublayer)/PMA(physical medium attachment), link-level protocol for reliable packet exchange
Transport: Routing, multicast, and programming model
Logical: Logical I/O, messaging, global shared memory (CC-NUMA), flow control, data streaming

System specifications include:

System Initialization
Error Management/Hot Swap

PCS是物理编码子层（Physical Coding Sublayer），它处理数据信号的编码和解码，以及错误检测和校正。PCS负责将逻辑上的数据流转换为物理层面上的数字信号，并通过使用8b/10b编码或128b/130b编码等技术来确保数据传输的可靠性和正确性。
PMA是物理介质子层（Physical Medium Attachment），它负责管理电气、时钟和定时等物理层面的信号特性。PMA还处理高速数据传输所需的时序控制和信号重建，并确保信号能够正确地传输到远端接收器。

The Ethernet PCS sublayer is at the top of the Ethernet physical layer (PHY). The hierarchy is as follows:

Data link layer (Layer 2)
- Logical link control (LLC) sublayer
- Medium access control (MAC) sublayer
  - Reconciliation sublayer (RS) – This sublayer processes PHY local/remote fault messages and handles DDR conversion
PHY Layer (Layer 1)
- Physical coding sublayer (PCS) – This sublayer determines when a functional link has been established, provides rate difference compensation, and performs coding such as 64b/66b encoding and x58+x39+1 scrambling/descrambling
- Physical medium attachment (PMA) sublayer – This sublayer performs PMA framing, octet synchronization/detection, and x7+x6+1 scrambling/descrambling
- Physical medium dependent (PMD) sublayer – This sublayer consists of a transceiver for the physical medium