CLK_OF_DECLARE(exynos4412_clk, "samsung,exynos4412-clock", exynos4412_clk_init); //若设备树有"samsung,exynos4412-clock",则exynos4412_clk_init被调用
exynos4412_clk_init(struct device_node *np)
exynos4_clk_init(np, EXYNOS4X12);
//以下注册各种时钟模块
samsung_clk_of_register_fixed_ext();
exynos4_clk_register_finpll(ctx);
samsung_clk_register_pll(ctx, exynos4x12_plls, ARRAY_SIZE(exynos4x12_plls), reg_base);
samsung_clk_register_gate(ctx, exynos4x12_gate_clks, ARRAY_SIZE(exynos4x12_gate_clks));
struct clk* clk = clk_register(dev, &gate->hw); //创建clk
clk_register_clkdev(clk, list->alias, list->dev_name); //建立clk与dev设备的关系(但是4412没有建立这种关系,所以获取时不能轮询clocks链表)
samsung_clk_add_lookup(ctx, clk, list->id);
ctx->clk_data.clks[id] = clk; //放入数组中,其中id是由设备树指定。所以获取时,从设备树获得id值
samsung_clk_register_alias(ctx, exynos4_aliases, ARRAY_SIZE(exynos4_aliases));
samsung_clk_of_add_provider(np, ctx);
of_clk_add_provider(np, of_clk_src_onecell_get, &ctx->clk_data)
__set_clk_rates(node, clk_supplier);
轮询 "assigned-clock-rates","assigned-clocks","#clock-cells",取出 clk,并硬件上设置时钟频率
of_clk_src_onecell_get()
clk_data->clks[idx];
priv->xclk = devm_clk_get(dev, "sclk_cam0");
clk = clk_get(dev, id);
clk = __of_clk_get_by_name(dev->of_node, dev_id, con_id); //方法1 (根据设备树的id获得)
index = of_property_match_string(np, "clock-names", name); //根据 "sclk_cam0" 获得id号
clk = __of_clk_get(np, index, dev_id, name); //根据id号获得clk
clk = __of_clk_get_from_provider(&clkspec, dev_id, con_id);
clk_get_sys(dev_id, con_id); //方法2 (轮询clocks)
4412时钟架构分析
最新推荐文章于 2024-07-29 00:33:16 发布