1. 什么是C-states、C-mode?
为了在CPU空闲时节约能源,可以命令CPU进入低功耗模式。C-state是intel CPU处于空闲时的一种状态,CPU有几种电源模式,它们统称为“c状态”或“c模式”
低功耗模式最初是在486DX4处理器中引入的。到目前为止,已经引入了更多的功耗模式,并且对每种模式进行了增强,以使CPU在这些低功耗模式下消耗更少的功率。
CPU的每个状态都使用不同的电量,并且对应用程序性能的影响也不同。
每当CPU内核处于空闲状态时,内置的节能逻辑就会启动,并尝试将内核从当前的C状态转换为更高的C状态,从而关闭各种处理器组件以节省功耗。
但是你还需要了解,每次应用程序尝试在一个CPU来执行某些任务时,相应的CPU必须从其“更深的睡眠状态”返回到“运行状态”,这需要更多时间来唤醒计算机。 CPU并再次100%启动并运行。这个过程还必须在原子环境中完成,以便在启动CP U核心时没有任何人尝试使用cpu核心。
因此,CPU过渡到的各种C模式称为C-state。
它们通常从C0开始,但C0比较特殊,它正常的CPU工作模式,即CPU已100%的开启。
随着C-state级别的增加,CPU睡眠模式会更深,即,更多的电路和信号将被关闭,并且CPU需要更多的时间才能返回到C0模式(即唤醒)。
每种模式也有一个名称,其中每个c-state具有不同的省电策略,有些c级别还有不同的子模式。
下面链接有各级别cstate说明,intel手册上也有详细描述。
https://access.redhat.com/solutions/202743
mode Name What id does CPUs
C0 Operating State CPU fully turned on All CPUs
C1 Halt Stops CPU main internal clocks via software; bus interface unit and APIC are kept running at full speed 486DX4 and above
C1E Enhanced Halt Stops CPU main internal clocks via software and reduces CPU voltage; bus interface unit and APIC are kept running at full speed All socket 775 CPUs
C1E -- Stops all CPU internal clocks Turion 64, 65-nm Athlon X2 and Phenom CPUs
C2 Stop Grant Stops CPU main internal clocks via hardware; bus interface unit and APIC are kept running at full speed 486DX4 and above
C2 Stop Clock Stops CPU internal and external clocks via hardware Only 486DX4, Pentium, Pentium MMX, K5, K6, K6-2, K6-III
C2E Extended Stop Grant Stops CPU main internal clocks via hardware and reduces CPU voltage; bus interface unit and APIC are kept running at full speed Core 2 Duo and above (Intel only)
C3 Sleep Stops all CPU internal clocks Pentium II, Athlon and above, but not on Core 2 Duo E4000 and E6000
C3 Deep Sleep Stops all CPU internal and external clocks Pentium II and above, but not on Core 2 Duo E4000 and E6000; Turion 64
C3 AltVID Stops all CPU internal clocks and reduces CPU voltage AMD Turion 64
C4 Deeper Sleep Reduces CPU voltage Pentium M and above, but not on Core 2 Duo E4000 and E6000 series; AMD Turion 64
C4E/C5 Enhanced Deeper Sleep Reduces CPU voltage even more and turns off the memory cache Core Solo, Core Duo and 45-nm mobile Core 2 Duo only
C6 Deep Power Down Reduces the CPU internal voltage to any value, including 0 V 45-nm mobile Core 2 Duo only
C7 Deep Energy Saving The CPU tries to flush its L3 cache. If the L3 cache is able to be entirely cleared, the CPU cuts its power to save energy. The power from the system agent is removed too. —
C7s — When an MWAIT(C7) command is issued with a C7s sub-state hint, the entire L3 cache is flushed in one step as opposed to flushing the L3 cache in multiple steps. This also allows the system to send I/O devices to low power mode to reduce unnecessary power consumption when the system idles down. —
C8 — The L3 cache is flushed in a single step. The power to the PLL is cut. —
C9 — The VCCIN (VCC Input Voltage) gets lowered to a minimum. —
C10 — The single phase core management system, VR12.6, goes into a low-power state. The CPU is almost shut down. —
2. 如何禁用处理器睡眠状态?
对延迟敏感的应用程序不希望处理器进入到更深的